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39VF6401 参数 Datasheet PDF下载

39VF6401图片预览
型号: 39VF6401
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位/ 32兆位/ 64兆位( X16 )多用途闪存+ [16 Mbit / 32 Mbit / 64 Mbit (x16) Multi-Purpose Flash Plus]
分类和应用: 闪存
文件页数/大小: 32 页 / 498 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
 浏览型号39VF6401的Datasheet PDF文件第10页浏览型号39VF6401的Datasheet PDF文件第11页浏览型号39VF6401的Datasheet PDF文件第12页浏览型号39VF6401的Datasheet PDF文件第13页浏览型号39VF6401的Datasheet PDF文件第15页浏览型号39VF6401的Datasheet PDF文件第16页浏览型号39VF6401的Datasheet PDF文件第17页浏览型号39VF6401的Datasheet PDF文件第18页  
16 Mbit / 32 Mbit / 64 Mbit Multi-Purpose Flash Plus  
SST39VF1601 / SST39VF3201 / SST39VF6401  
SST39VF1602 / SST39VF3202 / SST39VF6402  
Preliminary Specifications  
AC CHARACTERISTICS  
TABLE 16: READ CYCLE TIMING PARAMETERS VDD = 2.7-3.6V  
SST39VFxx01/xx02-70  
SST39VFxx01/xx02-90  
Symbol  
TRC  
Parameter  
Min  
Max  
Min  
Max  
Units  
ns  
Read Cycle Time  
70  
90  
TCE  
Chip Enable Access Time  
Address Access Time  
70  
70  
35  
90  
90  
45  
ns  
TAA  
ns  
TOE  
Output Enable Access Time  
CE# Low to Active Output  
OE# Low to Active Output  
CE# High to High-Z Output  
OE# High to High-Z Output  
Output Hold from Address Change  
RST# Pulse Width  
ns  
1
TCLZ  
0
0
0
0
ns  
1
TOLZ  
ns  
1
TCHZ  
20  
20  
30  
30  
ns  
1
TOHZ  
ns  
1
TOH  
0
0
ns  
1
TRP  
500  
50  
500  
50  
ns  
1
TRHR  
RST# High before Read  
RST# Pin Low to Read Mode  
ns  
1,2  
TRY  
20  
20  
µs  
T16.3 1223  
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
2. This parameter applies to Sector-Erase, Block-Erase and Program operations.  
This parameter does not apply to Chip-Erase operations.  
TABLE 17: PROGRAM/ERASE CYCLE TIMING PARAMETERS  
Symbol Parameter  
Min  
Max  
Units  
µs  
TBP  
Word-Program Time  
10  
TAS  
Address Setup Time  
Address Hold Time  
WE# and CE# Setup Time  
WE# and CE# Hold Time  
OE# High Setup Time  
OE# High Hold Time  
CE# Pulse Width  
0
30  
0
ns  
TAH  
ns  
TCS  
ns  
TCH  
TOES  
TOEH  
TCP  
0
ns  
0
ns  
10  
40  
40  
30  
30  
30  
0
ns  
ns  
TWP  
WE# Pulse Width  
ns  
1
TWPH  
WE# Pulse Width High  
CE# Pulse Width High  
Data Setup Time  
ns  
1
TCPH  
TDS  
ns  
ns  
1
TDH  
Data Hold Time  
ns  
1
TIDA  
Software ID Access and Exit Time  
Sector-Erase  
150  
25  
ns  
TSE  
ms  
ms  
TBE  
Block-Erase  
25  
TSCE  
Chip-Erase  
50  
ms  
T17.1 1223  
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.  
©2003 Silicon Storage Technology, Inc.  
S71223-03-000  
11/03  
14