W255
Layout Example SDRAM (Mixed Voltage)
+2.5V Supply
FB
+3.3V Supply
FB
VDDQ2
VDDQ3
10 mF
0.005 mf
10 mF
C40.005 mF
C1
C2
C3
G
G
G
G
1
48
47
46
45
G
V
G
V
G
2
3
4
G
5
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
6
7
8
9
G
V
G
G
V
G
G
10
11
12
G
G
V
G
V
G
13 G
G
G
G
G
14
15
16
G
V
G
V
G
17
18 G
19
G
G
20
21
22
23
28
27
26
25
G
G
V
G
24
FB = Dale ILB1206 - 300 (300:ꢀ@ 100 MHz) or TDK ACB 2012L-120
PF
PFC2 & C4 = 0.005
C6 = 0.1ꢀPF
Ceramic Caps C1 and C3 = 10–22
= VIA to GND plane layer
V = VIA to respective supply plane layer
G
Note: Each supply plane or strip should have a ferrite bead and capacitors
All bypass caps = 0.1ꢀPF ceramic
Rev 1.0,November 25, 2006
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