W255
Storage Temperature...................................–65°C to +150°C
Maximum Ratings
Static Discharge Voltage .......................................... > 2000V
(per MIL-STD-883, Method 3015)
Supply Voltage to Ground Potential..................–0.5 to +7.0V
DC Input Voltage (except BUF_IN)............ –0.5V to VDD+0.5
Operating Conditions[2]
Parameter
VDD3.3
Description
Min.
3.135
2.375
0
Typ.
Max.
3.465
2.625
70
Unit
V
Supply Voltage
Supply Voltage
VDD2.5
TA
V
Operating Temperature (Ambient Temperature)
Output Capacitance
°C
pF
pF
COUT
CIN
6
5
Input Capacitance
Electrical Characteristics Over the Operating Range
Parameter
VIL
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output HIGH Current
Test Conditions
Min.
Typ.
Max.
Unit
V
For all pins except SMBus
0.8
VIH
IIL
2.0
V
VIN = 0V
50
50
PA
PA
mA
IIH
VIN = VDD
IOH
VDD = 2.375V
VOUT = 1V
–18
26
–32
35
IOL
Output LOW Current
VDD = 2.375V
VOUT = 1.2V
mA
VOL
VOH
IDD
Output LOW Voltage[3]
Output HIGH Voltage[3]
IOL = 12 mA, VDD = 2.375V
IOH = –12 mA, VDD = 2.375V
Unloaded outputs, 133 MHz
0.6
V
V
1.7
Supply Current[3]
(DDR-only mode)
400
500
mA
IDD
Supply Current
(DDR-only mode)
Loaded outputs, 133 MHz
PWR_DWN# = 0
mA
IDDS
Supply Current
100
PA
VOUT
Output Voltage Swing
See test circuity (refer to
Figure 1)
0.7
VDD +0.6
V
VOC
Output Crossing Voltage
(VDD/2) –
0.1
VDD/2
(VDD/2) +
0.1
V
INDC
Input Clock Duty Cycle
48
52
%
[4]
Switching Characteristics
Parameter
Name
Operating Frequency
Duty Cycle[3, 5] = t2 yꢀt1
Test Conditions
Min.
Typ.
Max.
Unit
–
–
66
200
MHz
%
Measured at 1.4V for 3.3V outputs
Measured at VDD/2 for 2.5V outputs
INDC
5%
–
INDC
5%
+
t3
SDRAM Rising Edge Rate[3]
SDRAM Falling Edge Rate[3]
DDR Rising Edge Rate[3]
Measured between 0.4V and 2.4V
Measured between 2.4V and 0.4V
1.0
1.0
0.5
2.75
2.75
1.50
V/ns
V/ns
V/ns
t4
t3d
Measured between 20% to 80% of
output (refer to Figure 1)
Notes:
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. Parameter is guaranteed by design and characterization. Not 100% tested in production.
4. All parameters specified with loaded outputs.
5. Duty cycle of input clock is 50%. Rising and falling edge rate is greater than 1 V/ns.
Rev 1.0,November 25, 2006
Page 4 of 9