W255
Switching Characteristics (continued)[4]
Parameter
Name
Test Conditions
Min.
Typ.
Max.
Unit
t4d
DDR Falling Edge Rate[3]
Measured between 20% to 80% of
output (refer to Figure 1)
0.5
1.50
V/ns
t5
t6
Output to Output Skew for DDR[3] All outputs equally loaded
100
150
ps
ps
Output to Output Skew for
SDRAM[3]
All outputs equally loaded
t7
t8
SDRAM Buffer LH Prop. Delay[3] Input edge greater than 1 V/ns
SDRAM Buffer HL Prop. Delay[3] Input edge greater than 1 V/ns
5
5
10
10
ns
ns
Switching Waveforms
Duty Cycle Timing
t
1
t
2
All Outputs Rise/Fall Time
3.3V
0V
2.4V
2.4V
0.4V
OUTPUT
0.4V
t
3
t
4
Output-Output Skew
OUTPUT
OUTPUT
t
5
SDRAM Buffer HH and LL Propagation Delay
1.5V
INPUT
1.5V
OUTPUT
t6
t7
Rev 1.0,November 25, 2006
Page 5 of 9
SPECTRALINEAR [ SPECTRALINEAR INC ]
