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W191H 参数 Datasheet PDF下载

W191H图片预览
型号: W191H
PDF下载: 下载PDF文件 查看货源
内容描述: 偏斜受控SDRAM缓冲区 [Skew Controlled SDRAM Buffer]
分类和应用: 动态存储器
文件页数/大小: 9 页 / 157 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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W191  
Pin Definitions  
Pin  
Type  
Pin Name  
Pin No.  
Pin Description  
SDRAM0:5  
1, 3, 6,  
11, 13, 15  
O
SDRAM Outputs: Provides buffered copy of BUF_IN. The propagation delay from a  
rising input edge to a rising output edge is 2.5 to 5 ns. All outputs are skew controlled  
to within 150 ps of each other.  
BUF_IN  
SDATA  
4
8
I
Clock Input: This clock input has an input threshold voltage of 1.5V (typ).  
I/O  
SMBus Data input: Data should be presented to this input as described in the SMBus  
section of this data sheet. Internal 250-k: pull-up resistor.  
SCLOCK  
VDDQ3  
GND  
9
I
SMBus clock input: The SMBus Data clock should be presented to this input as  
described in the SMBus section of this data sheet. Internal 250-k: pull-up resistor.  
7, 12, 16  
P
G
Power Connection: Power supply for core logic and output buffers. Connected to  
3.3V supply.  
2, 5, 10,  
14  
Ground Connection: Connect all ground pins to the common system ground plane.  
Serial Control  
Overview  
Serial control data is written to the W191 in ten bytes of eight  
bits each. Bytes are written in the order shown in Table 1  
The W191 is a skew controlled fanout buffer optimized for  
interface with registered DIMMs.  
Writing Data Bytes  
Functional Description  
Each bit in the data bytes control a particular device function.  
Bits are written MSB (most significant bit) first, which is bit 7.  
Table 1 gives the bit formats for registers located in Data  
Bytes 0-2.  
Output Drivers  
The W191 output buffers are CMOS type which deliver a  
rail-to-rail (GND to VDD) output voltage swing into a nominal  
capacitive load. Thus, output signaling is both TTL and CMOS  
level compatible. Nominal output buffer impedance is 15:.  
Table 1. Byte Writing Sequence  
Byte  
Sequence  
Byte Name  
Bit Sequence  
Byte Description  
1
Slave Address  
11010010  
Commands the W191 to accept the bits in Data Bytes 0-6 for internal  
register configuration. Since other devices may exist on the same  
common serial data bus, it is necessary to have a specific slave address  
for each potential receiver. The slave receiver address for the W191 is  
11010010. Register setting will not be made if the Slave Address is not  
correct (or is for an alternate slave receiver).  
2
3
Command Code  
Byte Count  
Don’t Care  
Don’t Care  
Unused by the W191, therefore bit values are ignored (don’t care). This  
byte must be included in the data write sequence to maintain proper byte  
allocation. The Command Code Byte is part of the standard serial  
communication protocol and may be used when writing to another  
addressed slave receiver on the serial data bus.  
Unused by the W191, therefore bit values are ignored (don’t care). This  
byte must be included in the data write sequence to maintain proper byte  
allocation. The Byte Count Byte is part of the standard serial communi-  
cation protocol and may be used when writing to another addressed slave  
receiver on the serial data bus.  
4
5
Data Byte 0  
Data Byte 1  
Data Byte 2  
Data Byte 3  
Data Byte 4  
Data Byte 5  
Data Byte 6  
Refer to  
Table 2  
The data bits in these bytes set internal W191 registers that control device  
operation. The data bits are only accepted when the Address Byte bit  
sequence is 11010010, as noted above. For description of bit control  
functions, refer to Table 2.  
6
7
Don’t Care  
8
9
10  
Rev 1.0,November 20, 2006  
Page 2 of 9