CY2SSTU32866
CK
CK
V
ICR
VID
tsu
th
VIH
VIL
VREF
Input
VREF
V
V
V
V
= 600mV
ID
V
/2
REF = DD
= V
+ 250mV (AC Voltage levels) for differential inputs. V = V for LVCMOS inputs.
IH DD
IH
IL
REF
REF
= V
- 250mV ( AC voltage levels) for differential inputs. V = V for LVCMOS inputs
IL DD
Figure 16. Set-up and Hold Times
CK
CK
V
V
ICR
V
ICR
I(P-P)
tPLH
tPHL
VOH
VOL
V
VTT
TT
Output
t
and t
are the same as t
PHL PD
PLH
Figure 17. Propagation Delay
LVCMOS RESET
Input
V
IH
VDD/2
V
IL
tRPHL
VTT
VOH
VOL
Output
t
and t
= V
are the same as t
PHL PD
PLH
V
V
+ 250mV (AC Voltage levels) for differential inputs. V = V for LVCMOS inputs.
IH DD
IH
IL
REF
= V
- 250mV ( AC voltage levels) for differential inputs. V = V for LVCMOS inputs
IL DD
REF
Figure 18. Propagation Delay after RESET#
VDD
DUT
R
L = 50:
Test Point
CL = 10pF
OUT
C
includes probe and jig capacitance
L
Figure 19. Load Circuit - High to Low Slew Measurement
Rev 1.0,November 25, 2006
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