欢迎访问ic37.com |
会员登录 免费注册
发布采购

S29GL128P90FFIR10 参数 Datasheet PDF下载

S29GL128P90FFIR10图片预览
型号: S29GL128P90FFIR10
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0伏只页面模式闪存具有90纳米的MirrorBit工艺技术 [3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology]
分类和应用: 闪存存储
文件页数/大小: 77 页 / 2742 K
品牌: SPANSION [ SPANSION ]
 浏览型号S29GL128P90FFIR10的Datasheet PDF文件第28页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第29页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第30页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第31页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第33页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第34页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第35页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第36页  
D a t a S h e e t ( P r e l i m i n a r y )  
7.7.4  
Chip Erase Command Sequence  
Chip erase is a six-bus cycle operation as indicated by Table 12.1 on page 68. These commands invoke the  
Embedded Erase algorithm, which does not require the system to preprogram prior to erase. The Embedded  
Erase algorithm automatically preprograms and verifies the entire memory to an all zero data pattern prior to  
electrical erase. After a successful chip erase, all locations of the chip contain FFFFh. The system is not  
required to provide any controls or timings during these operations. The Command Definitions on page 67  
shows the address and data requirements for the chip erase command sequence.  
When the Embedded Erase algorithm is complete, that sector returns to the read mode and addresses are no  
longer latched. The system can determine the status of the erase operation by using DQ7 or DQ6/DQ2. Refer  
to “Write Operation Status” for information on these status bits.  
The Unlock Bypass feature allows the host system to send program commands to the Flash device without  
first writing unlock cycles within the command sequence. See Section 7.7.8 for details on the Unlock Bypass  
function.  
Any commands written during the chip erase operation are ignored. However, note that a hardware reset  
immediately terminates the erase operation. If that occurs, the chip erase command sequence should be  
reinitiated once that sector has returned to reading array data, to ensure the entire array is properly erased.  
Software Functions and Sample Code  
Table 7.9 Chip Erase  
(LLD Function = lld_ChipEraseCmd)  
Cycle  
Description  
Unlock  
Operation  
Write  
Byte Address  
Base + AAAh  
Base + 555h  
Base + AAAh  
Base + AAAh  
Base + 555h  
Base + AAAh  
Word Address  
Base + 555h  
Base + 2AAh  
Base + 555h  
Base + 555h  
Base + 2AAh  
Base + 555h  
Data  
00AAh  
0055h  
0080h  
00AAh  
0055h  
0010h  
1
2
3
4
5
6
Unlock  
Write  
Setup Command  
Unlock  
Write  
Write  
Unlock  
Write  
Chip Erase Command  
Write  
The following is a C source code example of using the chip erase function. Refer to the Spansion Low Level  
Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory  
software development guidelines.  
/* Example: Chip Erase Command */  
/* Note: Cannot be suspended  
*/  
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;  
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;  
*( (UINT16 *)base_addr + 0x555 ) = 0x0080;  
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;  
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;  
*( (UINT16 *)base_addr + 0x000 ) = 0x0010;  
/* write unlock cycle 1  
/* write unlock cycle 2  
/* write setup command  
*/  
*/  
*/  
/* write additional unlock cycle 1 */  
/* write additional unlock cycle 2 */  
/* write chip erase command  
*/  
32  
S29GL-P MirrorBit® Flash Family  
S29GL-P_00_A7 November 8, 2007  
 复制成功!