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S29GL128P90FFIR10 参数 Datasheet PDF下载

S29GL128P90FFIR10图片预览
型号: S29GL128P90FFIR10
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0伏只页面模式闪存具有90纳米的MirrorBit工艺技术 [3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology]
分类和应用: 闪存存储
文件页数/大小: 77 页 / 2742 K
品牌: SPANSION [ SPANSION ]
 浏览型号S29GL128P90FFIR10的Datasheet PDF文件第31页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第32页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第33页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第34页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第36页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第37页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第38页浏览型号S29GL128P90FFIR10的Datasheet PDF文件第39页  
D a t a S h e e t ( P r e l i m i n a r y )  
7.7.7  
Accelerated Program  
Accelerated single word programming and write buffer programming operations are enabled through the  
WP#/ACC pin. This method is faster than the standard program command sequences.  
Note  
The accelerated program functions must not be used more than 10 times per sector.  
If the system asserts VHH on this input, the device automatically enters the aforementioned Unlock Bypass  
mode and uses the higher voltage on the input to reduce the time required for program operations. The  
system can then use the Write Buffer Load command sequence provided by the Unlock Bypass mode. Note  
that if a “Write-to-Buffer-Abort Reset” is required while in Unlock Bypass mode, the full 3-cycle RESET  
command sequence must be used to reset the device. Removing VHH from the ACC input, upon completion  
of the embedded program operation, returns the device to normal operation.  
„ Sectors must be unlocked prior to raising WP#/ACC to VHH  
.
„ The WP#/ACC pin must not be at VHH for operations other than accelerated programming, or device  
damage may result.  
„ It is recommended that WP#/ACC apply VHH after power-up sequence is completed. In addition, it is  
recommended that WP#/ACC apply from VHH to VIH/VIL before powering down VCC/VIO.  
7.7.8  
Unlock Bypass  
This device features an Unlock Bypass mode to facilitate shorter programming commands. Once the device  
enters the Unlock Bypass mode, only two write cycles are required to program data, instead of the normal  
four cycles.  
This mode dispenses with the initial two unlock cycles required in the standard program command sequence,  
resulting in faster total programming time. The Command Definitions on page 67 shows the requirements for  
the unlock bypass command sequences.  
During the unlock bypass mode, only the Read, Program, Write Buffer Programming, Write-to-Buffer-Abort  
Reset, and Unlock Bypass Reset commands are valid. To exit the unlock bypass mode, the system must  
issue the two-cycle unlock bypass reset command sequence. The first cycle must contain the sector address  
and the data 90h. The second cycle need only contain the data 00h. The sector then returns to the read  
mode.  
Software Functions and Sample Code  
The following are C source code examples of using the unlock bypass entry, program, and exit functions.  
Refer to the Spansion Low Level Driver User’s Guide (available soon on www.spansion.com) for general  
information on Spansion Flash memory software development guidelines.  
Table 7.14 Unlock Bypass Entry  
(LLD Function = lld_UnlockBypassEntryCmd)  
Cycle  
Description  
Unlock  
Operation  
Write  
Word Address  
Base + 555h  
Base + 2AAh  
Base + 555h  
Data  
00AAh  
0055h  
0020h  
1
2
3
Unlock  
Write  
Entry Command  
Write  
/* Example: Unlock Bypass Entry Command  
*/  
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;  
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;  
*( (UINT16 *)base_addr + 0x555 ) = 0x0020;  
/* write unlock cycle 1  
*/  
*/  
*/  
/* write unlock cycle 2  
/* write unlock bypass command  
/* At this point, programming only takes two write cycles.  
/* Once you enter Unlock Bypass Mode, do a series of like  
/* operations (programming or sector erase) and then exit  
/* Unlock Bypass Mode before beginning a different type of  
/* operations.  
*/  
*/  
*/  
*/  
*/  
November 8, 2007 S29GL-P_00_A7  
S29GL-P MirrorBit® Flash Family  
35  
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