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S29GL256M10TAIR10 参数 Datasheet PDF下载

S29GL256M10TAIR10图片预览
型号: S29GL256M10TAIR10
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0伏只页面模式闪存具有0.23微米的MirrorBit制程技术 [3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 160 页 / 4686 K
品牌: SPANSION [ SPANSION ]
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P r e l i m i n a r y  
DQ6: Toggle Bit I  
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm  
is in progress or complete, or whether the device has entered the Erase Suspend  
mode. Toggle Bit I may be read at any address, and is valid after the rising edge  
of the final WE# pulse in the command sequence (prior to the program or erase  
operation), and during the sector erase time-out.  
During an Embedded Program or Erase algorithm operation, successive read cy-  
cles to any address cause DQ6 to toggle. The system may use either OE# or CE#  
to control the read cycles. When the operation is complete, DQ6 stops toggling.  
After an erase command sequence is written, if all sectors selected for erasing  
are protected, DQ6 toggles for approximately 100 µs, then returns to reading  
array data. If not all selected sectors are protected, the Embedded Erase algo-  
rithm erases the unprotected sectors, and ignores the selected sectors that are  
protected.  
The system can use DQ6 and DQ2 together to determine whether a sector is ac-  
tively erasing or is erase-suspended. When the device is actively erasing (that is,  
the Embedded Erase algorithm is in progress), DQ6 toggles. When the device en-  
ters the Erase Suspend mode, DQ6 stops toggling. However, the system must  
also use DQ2 to determine which sectors are erasing or erase-suspended. Alter-  
natively, the system can use DQ7 (see the subsection on DQ7: Data# Polling).  
If a program address falls within a protected sector, DQ6 toggles for approxi-  
mately 1 µs after the program command sequence is written, then returns to  
reading array data.  
DQ6 also toggles during the erase-suspend-program mode, and stops toggling  
once the Embedded Program algorithm is complete.  
Table 33 shows the outputs for Toggle Bit I on DQ6. Figure 8 shows the toggle bit  
algorithm. Figure 20 in the “AC Characteristics” section shows the toggle bit tim-  
ing diagrams. Figure 21 shows the differences between DQ2 and DQ6 in graphical  
form. See also the subsection on DQ2: Toggle Bit II.  
April 30, 2004 S29GLxxxM_00A5  
S29GLxxxM MirrorBitTM Flash Family  
117  
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