A d v a n c e I n f o r m a t i o n
Test Conditions
3.3 V
2.7 kΩ
Device
Under
Test
C
6.2 kΩ
L
Note: Diodes are IN3064 or equivalent.
Figure 11. Tes t Setup
Table 33. Test Specifications
Test Condition
All Speeds
Unit
Output Load
1 TTL gate
Output Load Capacitance, CL
(including jig capacitance)
30
pF
Input Rise and Fall Times
5
ns
V
Input Pulse Levels
0.0 or VCC
0.5 VCC
0.5 VCC
Input timing measurement reference levels (See Note)
Output timing measurement reference levels
V
V
Key to Switching Waveforms
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
V
CC
0.5 V
Input
0.5 V
Measurement Level
Output
CC
CC
0.0 V
Figure 12. Input Waveforms and Measurement Levels
April 22, 2005 S29GL-A_00_A3
S29GL-A MirrorBit™ Flash Family
65
SPANSION [ SPANSION ]
