A d v a n c e I n f o r m a t i o n
AC Characteristics
Asynchronous Read Operations
Parameter
Speed Options
JEDEC
Std. Description
Test Setup
Min
0R
0P
0M
0J
Unit
t
t
Read Cycle Time (Note 1)
Address to Output Delay
48
48
52
54
64
67
ns
AVAV
RC
CE# = V
OE# = V
IL
IL
t
t
Max
54
64
69
67
ns
AVQV
ACC
t
t
Chip Enable to Output Delay
Output Enable to Output Delay
OE# = V
Max
Max
58
20
71
28
ns
ns
ELQV
CE
IL
t
t
GLQV
OE
Chip Enable to Output High Z
(Note 1)
t
t
Max
10
ns
EHQZ
DF
DF
Min
Max
Min
2
10
0
ns
ns
ns
t
t
Output Enable to Output High Z (Note 1)
GHQZ
Read
Output Enable
Hold Time (Note 1)
t
OEH
Toggle and
Data# Polling
Min
Min
10
2
ns
ns
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First (Note 1)
t
t
OH
AXQX
Notes:
1. Not 100% tested.
2. See Figure 12 and Table 22 for test specifications
tRC
Addresses Stable
tACC
Addresses
CE#
tDF
tOE
OE#
tOEH
WE#
tCE
tOH
HIGH Z
HIGH Z
Output Valid
Outputs
RESET#
RY/BY#
0 V
Figure 15. Conventional Read Operations Timings
74
S29CD032G
30606B0 March 22, 2004
SPANSION [ SPANSION ]
