A d v a n c e I n f o r m a t i o n
Test Conditions
Device
Under
Test
C
L
Note: Diodes are IN3064 or equivalent
Figure 12. Test Setup
Table 22. Test Specifications
Test Condition
54D, 64C
65A, 75E
Unit
Output Load
1 TTL gate
Output Load Capacitance, C (including jig capacitance)
L
30
100
pF
ns
V
Input Rise and Fall Times
5
Input Pulse Levels
0.0 V – V
IO
Input timing measurement reference levels
Output timing measurement reference levels
V
V
/2
/2
V
IO
V
IO
Key to Switching Waveforms
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
Switching Waveforms
VIO
VIO/2 V
VIO/2 V
Input
Measurement Level
Output
VSS
Figure 13. Input Waveforms and Measurement Levels
72
S29CD032G
30606B0 March 22, 2004
SPANSION [ SPANSION ]
