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MBM29DL324TE90TN 参数 Datasheet PDF下载

MBM29DL324TE90TN图片预览
型号: MBM29DL324TE90TN
PDF下载: 下载PDF文件 查看货源
内容描述: FLASH存储器CMOS 32米(4 MX 8/2 MX 16 )位双操作 [FLASH MEMORY CMOS 32 M (4 M X 8/2 M X 16) BIT Dual Operation]
分类和应用: 存储
文件页数/大小: 84 页 / 1272 K
品牌: SPANSION [ SPANSION ]
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MBM29DL32XTE/BE80/90  
• RESET  
Hardware Reset  
The MBM29DL32XTE/BE devices may be reset by driving the RESET pin to VIL. The RESET pin has a pulse  
requirement and has to be kept low (VIL) for at least “tRP” in order to properly reset the internal state machine.  
Any operation in the process of being executed will be terminated and the internal state machine will be reset  
to the read mode “tREADY” after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the  
devices require an additional “tRH” before it will allow read access. When the RESET pin is low, the devices will  
be in the standby mode for the duration of the pulse and all the data output pins will be tri-stated. If a hardware  
reset occurs during a program or erase operation, the data at that particular location will be corrupted. Please  
note that the RY/BY output signal should be ignored during the RESET pulse. See “RESET, RY/BY Timing  
Diagram” in “TIMING DIAGRAM” for the timing diagram. Refer to Temporary Sector Group Unprotection for  
additional functionality.  
• Byte/Word Configuration  
The BYTE pin selects the byte (8-bit) mode or word (16-bit) mode for the MBM29DL32XTE/BE devices. When  
this pin is driven high, the devices operate in the word (16-bit) mode. The data is read and programmed at DQ0  
to DQ15. When this pin is driven low, the devices operate in byte (8-bit) mode. Under this mode, the DQ15/A-1 pin  
becomes the lowest address bit and DQ8 to DQ14 bits are tri-stated. However, the command bus cycle is always  
an 8-bit operation and hence commands are written at DQ0 to DQ7 and the DQ8 to DQ15 bits are ignored. Refer  
to “Timing Diagram for Word Mode Configuration”, “Timing Diagram for Byte Mode Configuration” and “BYTE  
Timing Diagram for Write Operations” in “TIMING DIAGRAM” for the timing diagram.  
• Boot Block Sector Protection  
The Write Protection function provides a hardware method of protecting certain boot sectors without using VID.  
This function is one of two provided by the WP/ACC pin.  
If the system asserts VIL on the WP/ACC pin, the device disables program and erase functions in the two  
“outermost” 8 Kbyte boot sectors (MBM29DL32XTE : SA69 and SA70, MBM29DL32XBE : SA0 and SA1)  
independently of whether those sectors were protected or unprotected using the method described in “Sector  
Group Protection”. The two outermost 8 Kbyte boot sectors are the two sectors containing the lowest addresses  
in a bottom-boot-configured device, or the two sectors containing the highest addresses in a top-boot-configured  
device.  
If the system asserts VIH on the WP/ACC pin, the device reverts to whether the two outermost 8 Kbyte boot  
sectors were last set to be protected or unprotected. That is, sector group protection or unprotection for these  
two sectors depends on whether they were last protected or unprotected using the method described in “Sector  
Group Protection”.  
• Accelerated Program Operation  
MBM29DL32XTE/BE offers accelerated program operation which enables the programming in high speed.  
If the system asserts VACC to the WP/ACC pin, the device automatically enters the acceleration mode and the  
time required for program operation will reduce to about 60%. This function is primarily intended to allow high  
speed program, so caution is needed as the sector group will temporarily be unprotected.  
The system would use a fact program command sequence when programming during acceleration mode.  
Set command to fast mode and reset command from fast mode are not necessary. When the device enters the  
acceleration mode, the device automatically set to fast mode. Therefore, the present sequence could be used  
for programming and detection of completion during acceleration mode.  
Removing VACC from the WP/ACC pin returns the device to normal operation. Do not remove VACC from  
WP/ACC pin while programming. See “Accelerated Program Timing Diagram” in “TIMING DIAGRAM”.  
Erase operation during Accelerated Program Operation is strictly prohibited.  
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