MBM29DL32XTE/BE80/90
■ FUNCTIONAL DESCRIPTION
• Simultaneous Operation
MBM29DL32XTE/BE have feature, which is capability of reading data from one bank of memory while a program
or erase operation is in progress in the other bank of memory (simultaneous operation) , in addition to the
conventional features (read, program, erase, erase-suspend read, and erase-suspend program) . The bank
selection can be selected by bank address (A20 to A15) with zero latency.
The MBM29DL322TE/BE have two banks which contain
Bank 1 (8 KB × eight sectors, 64 KB × seven sectors) and Bank 2 (64 KB × fifty-six sectors) .
The MBM29DL323TE/BE have two banks which contain
Bank 1 (8 KB × eight sectors, 64 KB × fifteen sectors) and Bank 2 (64 KB × forty-eight sectors) .
The MBM29DL324TE/BE have two banks which contain
Bank 1 (8 KB × eight sectors, 64 KB × thirty-one sectors) and Bank 2 (64 KB × thirty-two sectors) .
The simultaneous operation can not execute multi-function mode in the same bank. “Simultaneous Operation”
in “■ FUNCTIONAL DESCRIPTION” shows combination to be possible for simultaneous operation. (Refer to
the “Bank-to-bank Read/Write Timing Diagram” in “■ TIMING DIAGRAM”.)
Simultaneous Operation
Case
Bank 1 status
Read Mode
Bank 2 status
Read Mode
1
2
3
4
5
6
7
Read Mode
Autoselect Mode
Program Mode
Erase Mode *
Read Mode
Read Mode
Read Mode
Autoselect Mode
Program Mode
Erase Mode *
Read Mode
Read Mode
* : By writing erase suspend command on the bank address of sector being erased, the erase operation gets
suspended so that it enables reading from or programming the remaining sectors.
• Read Mode
TheMBM29DL32XTE/BEhave twocontrolfunctionswhichmustbesatisfiedinordertoobtaindataattheoutputs.
CE is the power control and should be used for a device selection. OE is the output control and should be used
to gate data to the output pins if a device is selected.
Address access time (tACC) is equal to the delay from stable addresses to valid output data. The chip enable
access time (tCE) is the delay from stable addresses and stable CE to valid data at the output pins. The output
enable access time is the delay from the falling edge of OE to valid data at the output pins (Assuming the
addresses have been stable for at least tACC-tOE time) . When reading out a data without changing addresses
after power-up, it is necessary to input hardware reset or to change CE pin from “H” or “L”
• Standby Mode
There are two ways to implement the standby mode on the MBM29DL32XTE/BE devices, one using both the
CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at VCC ± 0.3 V.
Under this condition the current consumed is less than 5 µA Max During Embedded Algorithm operation, VCC
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SPANSION [ SPANSION ]
