MBM29DL32XTE/BE80/90
Suspend mode, and is ready for another valid operation. See “Autoselect Command Sequence” for more infor-
mation.
The system must write the Program Resume command (address bits are “Bank Address”) to exit from the
Program Suspend mode and continue programming operation. Further writes of the Resume command are
ignored. Another Program Suspend command can be written after the device resumes programming.
• Chip Erase
Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the chip erase command.
Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase
Algorithm command sequence the devices will automatically program and verify the entire memory for an all
zero data pattern prior to electrical erase (Preprogram function) . The system is not required to provide any
controls or timings during these operations.
The system can determine the status of the erase operation by using DQ7 (Data Polling) , DQ6 (Toggle Bit) , or
RY/BY. The chip erase begins on the rising edge of the last CE or WE, whichever happens first in the command
sequence and terminates when the data on DQ7 is “1” (See Write Operation Status section.) at which time the
device returns to read the mode.
Chip Erase Time; Sector Erase Time × All sectors + Chip Program Time (Preprogramming)
“Embedded EraseTM Algorithm” in “■ FLOW CHART” illustrates the Embedded EraseTM Algorithm using typical
command strings and bus operations.
• Sector Erase
Sector erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the
“set-up” command. Two more “unlock” write cycles are then followed by the Sector Erase command. The sector
address (any address location within the desired sector) is latched on the falling edge of CE or WE whichever
happens later, while the command (Data = 30h) is latched on the rising edge of CE or WE which happens first.
After time-out of “tTOW” from the rising edge of the last sector erase command, the sector erase operation will
begin.
Multiple sectors may be erased concurrently by writing the six bus cycle operations on “MBM29DL32XTE/BE
Command Definitions” in “■ DEVICEBUS OPERATION”. This sequence is followed with writes of the Sector
Erase command to addresses in other sectors desired to be concurrently erased. The time between writes must
be less than “tTOW” otherwise that command will not be accepted and erasure will start. It is recommended that
processor interrupts be disabled during this time to guarantee this condition. The interrupts can be re-enabled
after the last Sector Erase command is written. A time-out of “tTOW” from the rising edge of last CEor WE whichever
happens first will initiate the execution of the Sector Erase command (s) . If another falling edge of CE or WE,
whichever happens first occurs within the “tTOW” time-out window the timer is reset. (Monitor DQ3 to determine
if the sector erase timer window is still open, see section DQ3, Sector Erase Timer.) Resetting the devices once
execution has begun will corrupt the data in the sector. In that case, restart the erase on those sectors and allow
them to complete. (Refer to the Write Operation Status section for Sector Erase Timer operation.) Loading the
sector erase buffer may be done in any sequence and with any number of sectors (0 to 38) .
Sector erase does not require the user to program the devices prior to erase. The devices automatically program
all memory locations in the sector (s) to be erased prior to electrical erase (Preprogram function) . When erasing
a sector or sectors the remaining unselected sectors are not affected. The system is not required to provide any
controls or timings during these operations.
The system can determine the status of the erase operation by using DQ7 (Data Polling) , DQ6 (Toggle Bit) , or
RY/BY.
The sector erase begins after the “tTOW” time out from the rising edge of CE or WE whichever happens first for
the last sector erase command pulse and terminates when the data on DQ7 is “1” (See Write Operation Status
41
SPANSION [ SPANSION ]
