D A T A S H E E T
addresses given in Tables 4–7. To terminate reading
COMMON FLASH MEMORY INTERFACE
(CFI)
CFI data, the system must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 4–7. The
system must write the reset command to return the
device to the autoselect mode.
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-indepen-
dent, JEDEC ID-independent, and forward- and back-
ward-compatible for the specified flash device families.
Flash vendors can standardize their existing interfaces
for long-term compatibility.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/products/nvd/over-
view/cfi.html. Alternatively, contact an AMD represen-
tative for copies of these documents.
This device enters the CFI Query mode when the
system writes the CFI Query command, 98h, to
address 55h, any time the device is ready to read array
data. The system can read CFI information at the
To terminate reading CFI data, the system must write
the reset command.
Table 4. CFI Query Identification String
Description
Addresses
Data
10h
11h
12h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
Primary OEM Command Set
13h
14h
0002h
0000h
15h
16h
0040h
0000h
Address for Primary Extended Table
17h
18h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
19h
1Ah
0000h
0000h
Table 5. System Interface String
Description
Addresses
Data
V
Min. (write/erase)
CC
1Bh
0027h
D7–D4: volt, D3–D0: 100 millivolt
V
Max. (write/erase)
CC
1Ch
0036h
D7–D4: volt, D3–D0: 100 millivolt
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
0000h
0000h
0004h
0000h
000Ah
0000h
0005h
0000h
0004h
0000h
V
V
Min. voltage (00h = no V pin present)
PP
PP
PP
Max. voltage (00h = no V pin present)
PP
N
Typical timeout per single word write 2 µs
N
Typical timeout for Min. size buffer write 2 µs (00h = not supported)
N
Typical timeout per individual block erase 2 ms
N
Typical timeout for full chip erase 2 ms (00h = not supported)
N
Max. timeout for word write 2 times typical
N
Max. timeout for buffer write 2 times typical
N
Max. timeout per individual block erase 2 times typical
N
Max. timeout for full chip erase 2 times typical (00h = not supported)
July 8, 2005
Am29BL162C
15
SPANSION [ SPANSION ]
