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CXD2510Q 参数 Datasheet PDF下载

CXD2510Q图片预览
型号: CXD2510Q
PDF下载: 下载PDF文件 查看货源
内容描述: CD数字信号处理器 [CD Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 48 页 / 710 K
品牌: SONY [ SONY CORPORATION ]
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CXD2510Q  
Pin  
No.  
Symbol  
I/O  
1, 0  
Description  
DA16 (MSB) output when PSSL = 1.  
34  
35  
36  
DA16  
DA15  
DA14  
O
O
O
48-bit slot serial data (two's complement, MSB first) when PSSL = 0.  
1, 0  
1, 0  
DA15 output when PSSL = 1. 48-bit slot bit clock when PSSL = 0.  
DA14 output when PSSL = 1.  
64-bit slot serial data (two's complement, LSB first) when PSSL = 0.  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
DA13  
DA12  
DA11  
DA10  
DA09  
DA08  
DA07  
DA06  
DA05  
DA04  
DA03  
DA02  
DA01  
O
O
O
O
O
O
O
O
O
O
O
O
O
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
1, 0  
DA13 output when PSSL = 1. 64-bit slot bit clock when PSSL = 0.  
DA12 output when PSSL = 1. 64-bit slot LR clock when PSSL = 0.  
DA11 output when PSSL = 1. GTOP output when PSSL = 0.  
DA10 output when PSSL = 1. XUGF output when PSSL = 0.  
DA09 output when PSSL = 1. XPLCK output when PSSL = 0.  
DA08 output when PSSL = 1. GFS output when PSSL = 0.  
DA07 output when PSSL = 1. RFCK output when PSSL = 0.  
DA06 output when PSSL = 1. C2PO output when PSSL = 0.  
DA05 output when PSSL = 1. XRAOF output when PSSL = 0.  
DA04 output when PSSL = 1. MNT3 output when PSSL = 0.  
DA03 output when PSSL = 1. MNT2 output when PSSL = 0.  
DA02 output when PSSL = 1. MNT1 output when PSSL = 0.  
DA01 output when PSSL = 1. MNT0 output when PSSL = 0.  
Aperture compensation control output.  
This pin outputs a high signal when the right channel is used.  
50  
51  
APTR  
APTL  
O
O
1, 0  
1, 0  
Aperture compensation control output.  
This pin outputs a high signal when the left channel is used.  
52  
53  
54  
55  
Vss  
GND  
XTAI  
XTAO  
XTSL  
I
O
I
16.9344MHz crystal oscillation circuit input. Also the 33.8688MHz input.  
16.9344MHz crystal oscillation circuit output.  
1, 0  
1, 0  
Crystal selector input. The crystal is low for 16.9344MHz, and high for 33.8688MHz.  
2/3 frequency divider output for Pins 53 and 54.  
This pin does not change with the variable pitch.  
56  
57  
FSTT  
FSOF  
O
O
1/4 frequency divider output for Pins 53 and 54.  
This pin does not change with the variable pitch.  
1, 0  
1, 0  
58  
59  
60  
C16M  
MD2  
O
I
16.9344MHz output. This pin changes simultaneously with the variable pitch.  
Digital-out on/off control. High: on; low: off  
Digital-out output.  
DOUT  
O
1, 0  
1, 0  
Outputs a high signal when the playback disc has emphasis, and a low signal  
when there is no emphasis.  
61  
EMPH  
O
62  
63  
64  
65  
WFCK  
SCOR  
SBSO  
EXCK  
O
O
O
I
1, 0  
1, 0  
1, 0  
WFCK (write frame clock) output.  
Outputs a high signal when either subcode sync S0 or S1 is detected.  
Sub P to W serial output.  
SBSO readout clock input.  
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