CXD2510Q
Pin Description
Pin
Symbol
No.
I/O
Description
1
2
3
4
5
FOK
FSW
MON
MDP
MDS
I
Focus OK input. Used for SENS output and the servo auto sequencer.
Spindle motor output filter switching output.
O
O
O
O
Z, 0
1, 0
Spindle motor on/off control output.
1, Z, 0 Spindle motor servo control.
1, Z, 0 Spindle motor servo control.
GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
If GFS is low eight consecutive samples, this pin outputs low.
6
LOCK
O
1, 0
—
7
NC
8
VCOO
VCOI
TEST
PDO
Vss
O
I
1, 0
Analog EFM PLL oscillation circuit output.
Analog EFM PLL oscillation circuit input. fLOCK = 8.6436MHz.
TEST pin. Normally GND.
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
I
O
1, Z, 0 Analog EFM PLL charge pump output.
GND
—
—
—
TEST0
NC
TEST output pin. Normally open.
NC
VPCO
VCKI
FILO
FILI
O
I
1, Z, 0 Variable pitch PLL charge pump output.
Variable pitch clock input from the external VCO. fc center = 16.9344MHz.
Analog Master PLL filter output.
Master PLL filter input.
O
I
PCO
AVss
CLTV
AVDD
RF
O
1, Z, 0 Master PLL charge pump output.
Analog GND.
I
Master VCO control voltage input.
Analog power supply (5V).
I
I
EFM signal input.
BIAS
ASYI
ASYO
ASYE
NC
Constant current input of the asymmetry circuit.
Asymmetry comparator voltage input.
I
O
I
1, 0
EFM full-swing output (low = Vss, high = VDD).
Low: asymmetry circuit off; high: asymmetry circuit on
—
PSSL
WDCK
LRCK
VDD
I
Audio data output mode switching input. Low: serial output; high: parallel output.
D/A interface for 48-bit slot. Word clock f = 2Fs.
D/A interface for 48-bit slot. LR clock f = Fs.
Power supply (5V).
O
O
1, 0
1, 0
– 3 –
SONY [ SONY CORPORATION ]
