CXD1199AQ
3-1-7. HCLRCTL (HOST clear control) register
When each bit of this register is set high, the chip, status, register, interrupt status and interrupt request to
the host generated by the status are cleared.
bit 7 : CHPRST (chip reset)
The inside of the IC is initialized by setting this bit high. The bit is automatically set low upon
completion of the initialization of the IC. There is therefore no need for the host to reset low. When
the inside of the IC is initialized by setting bit high, the XHRS pin is set low.
bit 6 : CLRPRM (clear parameter)
The parameter register is cleared by setting this bit high. The bit is automatically set low upon
completion of the clearing for the parameter register. There is therefore no need for the host to
reset low.
bit 5 : SMADPCLR (sound map ADPCM clear)
This bit is set high to terminate sound map ADPCM decoding forcibly.
(1) When this bit has been set high for sound map ADPCM playback (when both SMEN and
ADPBSY (HSTS register bit 2) are high):
• ADPCM decoding during playback is suspended. (Noise may be generated).
• The sound map and buffer management circuits in the IC are cleared, making the buffer
empty. The BFEMPT interrupt status is established.
(Note) Set the SMEN bit low at the same time as this bit is set high.
(2) Setting this bit high when the sound map ADPCM playback is not being performed has no
effect whatsoever
bit 4 : CLRBFWRDY (clear buffer write ready interrupt)
bit 3 : CLRBFEMPT (clear buffer write empty interrupt)
bits 2 to 0 : CLRINT#2 to 0 (clear interrupt #2 to 0)
bit 4 clears the corresponding interrupt status.
3-1-8. CI (coding information) register
This sets the coding information for sound map playback. The bit allocation is the same as that for the
coding information bytes of the sub header.
bits 7, 5, 3, 1: Reserved
bit 6 : EMPHASIS
High : Emphasis ON
Low : Emphasis OFF
bit 4 : BITLNGTH
High : 8 bits
Low : 4 bits
bit 2 : FS
High : 18.9 kHz
Low : 37.8 kHz
bit 0 : S/M (stereo/mono)
High : Stereo
Low : Mono
3-1-9. ATV (attenuation value) register 0
3-1-10. ATV (attenuation value) register 1
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