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SN8P26042A 参数 Datasheet PDF下载

SN8P26042A图片预览
型号: SN8P26042A
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-Bit Micro-Controller]
分类和应用: 微控制器
文件页数/大小: 101 页 / 733 K
品牌: SONIX [ SONIX TECHNOLOGY COMPANY ]
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SN8P2604A  
8-Bit Micro-Controller  
6.6 INT0 (P0.0) INTERRUPT OPERATION  
When the INT0 trigger occurs, the P00IRQ will be set to “1” no matter the P00IEN is enable or disable. If the P00IEN =  
1 and the trigger event P00IRQ is also set to be “1”. As the result, the system will execute the interrupt vector (ORG  
8). If the P00IEN = 0 and the trigger event P00IRQ is still set to be “1”. Moreover, the system won’t execute interrupt  
vector even when the P00IRQ is set to be “1”. Users need to be cautious with the operation under multi-interrupt  
situation.  
’
Note: The interrupt trigger direction of P0.0 is control by PEDGE register.  
0BFH  
PEDGE  
Read/Write  
After reset  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
P00G1  
R/W  
1
Bit 3  
P00G0  
R/W  
0
Bit 2  
Bit 1  
Bit 0  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit[4:3]  
P00G[1:0]: P0.0 interrupt trigger edge control bits.  
00 = reserved.  
01 = rising edge.  
10 = falling edge.  
11 = rising/falling bi-direction (Level change trigger).  
¾
Example: Setup INT0 interrupt request and bi-direction edge trigger.  
MOV  
A, #18H  
B0MOV  
PEDGE, A  
; Set INT0 interrupt trigger as bi-direction edge.  
B0BSET  
B0BCLR  
B0BSET  
FP00IEN  
FP00IRQ  
FGIE  
; Enable INT0 interrupt service  
; Clear INT0 interrupt request flag  
; Enable GIE  
¾
Example: INT0 interrupt service routine.  
ORG  
JMP  
8
; Interrupt vector  
INT_SERVICE  
INT_SERVICE:  
; Push routine to save ACC and PFLAG to buffers.  
B0BTS1  
JMP  
FP00IRQ  
EXIT_INT  
; Check P00IRQ  
; P00IRQ = 0, exit interrupt vector  
B0BCLR  
FP00IRQ  
; Reset P00IRQ  
; INT0 interrupt service routine  
EXIT_INT:  
; Pop routine to load ACC and PFLAG from buffers.  
; Exit interrupt vector  
RETI  
SONiX TECHNOLOGY CO., LTD  
Page 63  
Version 0.2  
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