SN8P2604A
8-Bit Micro-Controller
6.3INTRQ INTERRUPT REQUEST REGISTER
INTRQ is the interrupt request flag register. The register includes all interrupt request indication flags. Each one of the
interrupt requests occurs, the bit of the INTRQ register would be set “1”. The INTRQ value needs to be clear by
programming after detecting the flag. In the interrupt vector of program, users know the any interrupt requests
occurring by the register and do the routine corresponding of the interrupt request.
0C8H
INTRQ
Read/Write
After reset
Bit 7
Bit 6
TC1IRQ
R/W
Bit 5
Bit 4
T0IRQ
R/W
0
Bit 3
Bit 2
Bit 1
P01IRQ
R/W
Bit 0
P00IRQ
R/W
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
Bit 0
Bit 1
Bit 4
Bit 6
P00IRQ: External P0.0 interrupt (INT0) request flag.
0 = None INT0 interrupt request.
1 = INT0 interrupt request.
P01IRQ: External P0.1 interrupt (INT1) request flag.
0 = None INT1 interrupt request.
1 = INT1 interrupt request.
T0IRQ: T0 timer interrupt request flag.
0 = None T0 interrupt request.
1 = T0 interrupt request.
TC1IRQ: TC1 timer interrupt request flag.
0 = None TC1 interrupt request.
1 = TC1 interrupt request.
6.4GIE GLOBAL INTERRUPT OPERATION
GIE is the global interrupt control bit. All interrupts start work after the GIE = 1 It is necessary for interrupt service
request. One of the interrupt requests occurs, and the program counter (PC) points to the interrupt vector (ORG 8) and
the stack add 1 level.
0DFH
STKP
Read/Write
After reset
Bit 7
GIE
R/W
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
STKPB2
R/W
Bit 1
STKPB1
R/W
Bit 0
STKPB0
R/W
-
-
-
-
-
-
-
-
-
-
-
-
1
1
1
Bit 7
GIE: Global interrupt control bit.
0 = Disable global interrupt.
1 = Enable global interrupt.
¾
Example: Set global interrupt control bit (GIE).
B0BSET FGIE
; Enable GIE
Note: The GIE bit must enable during all interrupt operation.
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