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LPC47M182-NR 参数 Datasheet PDF下载

LPC47M182-NR图片预览
型号: LPC47M182-NR
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的I / O控制器,主板胶合逻辑 [ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC]
分类和应用: 控制器
文件页数/大小: 223 页 / 1215 K
品牌: SMSC [ SMSC CORPORATION ]
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Advanced I/O Controller with Motherboard GLUE Logic  
Datasheet  
7.4.2 Status Port  
ADDRESS OFFSET = 01H  
The Status Port is located at an offset of ‘01H’ from the base address. The contents of this register are  
latched for the duration of a read cycle. The bits of the Status Port are defined as follows:  
BIT 0 TMOUT - TIME OUT  
This bit is valid in EPP mode only and indicates that a 10 usec time out has occurred on the EPP bus. A  
logic O means that no time out error has occurred; a logic 1 means that a time out error has been  
detected. This bit is cleared by a RESET. If the TIMEOUT_SELECT bit (bit 4 of the Parallel Port Mode  
Register 2, 0xF1 in Serial Port Logical Device Configuration Registers) is ‘0’, writing a one to this bit clears  
the TMOUT status bit. Writing a zero to this bit has no effect. If the TIMEOUT_SELECT bit (bit 4 of the  
Parallel Port Mode Register 2, 0xF1 in Serial Port Logical Device Configuration Registers) is ‘1’, the  
TMOUT bit is cleared on the trailing edge of a read of the EPP Status Register.  
BITS 1, 2 - are not implemented as register bits, during a read of the Printer Status Register these bits are  
a low level.  
BIT 3 nERR – nERROR  
The level on the nERROR input is read by the CPU as bit 3 of the Printer Status Register. A logic 0  
means an error has been detected; a logic 1 means no error has been detected.  
BIT 4 SLT - PRINTER SELECTED STATUS  
The level on the SLCT input is read by the CPU as bit 4 of the Printer Status Register. A logic 1 means  
the printer is on line; a logic 0 means it is not selected.  
BIT 5 PE - PAPER END  
The level on the PE input is read by the CPU as bit 5 of the Printer Status Register. A logic 1 indicates a  
paper end; a logic 0 indicates the presence of paper.  
BIT 6 nACK - ACKNOWLEDGE  
The level on the nACK input is read by the CPU as bit 6 of the Printer Status Register. A logic 0 means  
that the printer has received a character and can now accept another. A logic 1 means that it is still  
processing the last character or has not received the data.  
BIT 7 nBUSY - nBUSY  
The complement of the level on the BUSY input is read by the CPU as bit 7 of the Printer Status Register.  
A logic 0 in this bit means that the printer is busy and cannot accept a new character. A logic 1 means that  
it is ready to accept the next character.  
7.4.3 CONTROL PORT  
ADDRESS OFFSET = 02H  
The Control Port is located at an offset of ‘02H’ from the base address. The Control Register is initialized  
by the RESET input, bits 0 to 5 only being affected; bits 6 and 7 are hard wired low.  
SMSC LPC47M182  
97  
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)  
DATASHEET  
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