Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Table 6.31 - Reset Function Table
REGISTER/SIGNAL
Interrupt Enable Register
Interrupt Identification Reg.
FIFO Control
RESET CONTROL
RESET
RESET
RESET
RESET
RESET STATE
All bits low
Bit 0 is high; Bits 1 - 7 low
All bits low
Line Control Reg.
All bits low
MODEM Control Reg.
Line Status Reg.
MODEM Status Reg.
RESET
RESET
RESET
All bits low
All bits low except 5, 6 high
Bits 0 - 3 low; Bits 4 - 7 input
TXD1, TXD2
INTRPT (RCVR errs)
RESET
RESET/Read LSR
High
Low
INTRPT (RCVR Data Ready) RESET/Read RBR
Low
Low
INTRPT (THRE)
RESET/ReadIIR/Write THR
OUT2B
RTSB
RESET
RESET
High
High
DTRB
RESET
High
OUT1B
RCVR FIFO
RESET
RESET/
High
All Bits Low
FCR1*FCR0/_FCR0
RESET/
FCR1*FCR0/_FCR0
XMIT FIFO
All Bits Low
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
90
SMSC LPC47M182
DATASHEET
SMSC [ SMSC CORPORATION ]
