Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Table 13.4 – SCK_BJT_GATE Timing
DESCRIPTION (Refer to Figure 13.29) MIN
NAME
Tf
TYP
TYP
MAX
50
UNITS
ns
SCK_BJT_GATE (B) low to high fall time. Measured
form 90% to 10%
Tpropf SCK_BJT_GATE (B) high to low propagation time.
Measured from PWRGD_PLATFORM (A) to
SCK_BJT_GATE (B).
1
us
CO
CL
Output Capacitance
Load Capacitance
25
50
pF
pF
Table 13.5 – PWRGD_PLATFORM Timing
DESCRIPTION (Refer to Figure 13.29) MIN
PWRGD_PLATFORM (B) low to high rise time.
NAME
Tr
Tf
MAX
50
50
UNITS
ns
ns
PWRGD_PLATFORM (B) low to high fall time.
Measured form 90% to 10%
Tpropr PWRGD_PLATFORM (B) low to high propagation time.
1
1
us
us
Measured from nFPRST (A) to PWRGD_PLATFORM
(B).
Tpropf PWRGD_PLATFORM (B) high to low propagation time.
Measured from nFPRST (A) to PWRGD_PLATFORM
(B).
CO
CL
Output Capacitance
Load Capacitance
25
50
pF
pF
Table 13.6 – CNR CODEC Down Enable Timing
NAME DESCRIPTION (Refer to Figure 13.29) MIN TYP
MAX
UNITS
us
Tr
nCDC_DWN_RST (B) rise time. Measured
6
from 10% to 90%.
Tf
nCDC_DWN_RST (B) fall time. Measured
from 90% to 10%.
6
us
ns
Tpropr nCDC_DWN_RST (B) low to high
propagation delay. Measured from
nAUD_LNK_RST (A) or nCDC_DWN_ENAB
(A) to nCDC_DWN_RST (B).
15.3
Tpropf nCDC_DWN_RST (B) high to low
propagation delay. Measured from
nAUD_LNK_RST (A) or nCDC_DWN_ENAB
(A) to nCDC_DWN_RST (B).
15.3
ns
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
218
SMSC LPC47M182
DATASHEET
SMSC [ SMSC CORPORATION ]
