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LPC47M14B-NC 参数 Datasheet PDF下载

LPC47M14B-NC图片预览
型号: LPC47M14B-NC
PDF下载: 下载PDF文件 查看货源
内容描述: 128 PIN ENGANCED超级I / O与LPC接口和USB集线器控制器 [128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB]
分类和应用: 控制器PC
文件页数/大小: 205 页 / 1208 K
品牌: SMSC [ SMSC CORPORATION ]
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GP35, GP42, GP53, GP60 and GP61:  
Buffers powered by VTR. GP35 and GP53 have IRTX as the alternate function and their output buffers are  
powered by VTR so that the pins are always forced low when not used. GP42 is the nIO_PME pin, which is  
active under VTR. GP60 and GP61 have LED as the alternate function and the logic is able to control the pin  
under VTR.  
The IRTX pins (IRTX2/GP35 and GP53/TXD2(IRTX)) are powered by VTR so that they are driven low when VCC =  
0V with VTR = 3.3V. These pins will remain low following a VCC POR until serial port 2 is enabled by setting the  
activate bit, at which time the pin will reflect the state of the transmit output of the Serial Port 2 block.  
The following list summarizes the blocks, registers and pins that are powered by VTR.  
USB Hub  
PME interface block  
PME runtime register block (includes all PME, SMI, GPIO, Fan and other miscellaneous registers)  
“Wake on Specific Key” logic  
LED control logic  
Fan Tachometers  
Pins for PME Wakeup:  
GP42/nIO_PME (output, buffer powered by VTR)  
nRI1 (input)  
GP50/nRI2 (input)  
GP52/RXD2(IRRX) (input)  
KDAT (input)  
MDAT (input)  
GPIOs (GP10-GP17, GP20-GP22, GP24-GP27, GP30-GP33, GP41, GP43, GP50-GP57, GP60, and  
GP61) – all input-only except GP53, GP60, and GP61. See below.  
Other Pins  
IRTX2/GP35 (output, buffer powered by VTR)  
GP53/TXD2(IRTX) (output, buffer powered by VTR)  
GP60/LED1 (output, buffer powered by VTR)  
GP61/LED2 (output, buffer powered by VTR)  
5.8 MAXIMUM CURRENT VALUES  
See the “Operational Description” section for the maximum current values.  
The maximum VTR current, ITR, is given with all outputs open (not loaded), and all inputs in a fixed state (i.e., 0V or  
3.3V). The total maximum current for the part is the unloaded value PLUS the maximum current sourced by all pins  
that are driven by VTR. The pins that are powered by VTR are as follows: GP42/nIO_PME, IRTX2/GP35,  
GP53/TXD2(IRTX), GP60/LED1, GP61/LED2, and CLKI32. These pins, if configured as push-pull outputs, will  
source a minimum of 6mA at 2.4V when driving.  
The maximum VCC current, ICC, is given with all outputs open (not loaded) , and all inputs in a fixed state  
(i.e., 0V or 3.3V).  
The maximum VREF current, IREF, is given with all outputs open (not loaded) , and all inputs in a fixed state  
(i.e., 0V or 3.3V).  
5.9 POWER MANAGEMENT EVENTS (PME/SCI)  
The LPC47M14x offers support for Power Management Events (PMEs), also referred to as System Control Interrupt  
(SCI) events. The terms PME and SCI are used synonymously throughout this document to refer to the indication of  
an event to the chipset via the assertion of the nIO_PME output signal on pin 17. See the “PME Support” section.  
SMSC DS – LPC47M14X  
Page 19  
Rev. 03/19/2001  
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