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LPC47M148-NC 参数 Datasheet PDF下载

LPC47M148-NC图片预览
型号: LPC47M148-NC
PDF下载: 下载PDF文件 查看货源
内容描述: 128 PIN ENGANCED超级I / O与LPC接口和USB集线器控制器 [128 PIN ENGANCED SUPER I/O CONTROLLER WITH AN LPC INTERFACE AND USB HUB]
分类和应用: 控制器PC
文件页数/大小: 205 页 / 1208 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号LPC47M148-NC的Datasheet PDF文件第53页浏览型号LPC47M148-NC的Datasheet PDF文件第54页浏览型号LPC47M148-NC的Datasheet PDF文件第55页浏览型号LPC47M148-NC的Datasheet PDF文件第56页浏览型号LPC47M148-NC的Datasheet PDF文件第58页浏览型号LPC47M148-NC的Datasheet PDF文件第59页浏览型号LPC47M148-NC的Datasheet PDF文件第60页浏览型号LPC47M148-NC的Datasheet PDF文件第61页  
Specify  
The Specify command sets the initial values for each of the three internal times. The HUT (Head Unload Time) defines  
the time from the end of the execution phase of one of the read/write commands to the head unload state. The SRT  
(Step Rate Time) defines the time interval between adjacent step pulses. Note that the spacing between the first and  
second step pulses may be shorter than the remaining step pulses. The HLT (Head Load Time) defines the time  
between when the Head Load signal goes high and the read/write operation starts. The values change with the data  
rate speed selection and are documented in Table 27. The values are the same for MFM and FM.  
A DMA operation is selected by the ND bit. When ND is "0", the DMA mode is selected. This part does not support non-  
DMA mode. In DMA mode, data transfers are signaled by the DMA request cycles.  
Configure  
The Configure command is issued to select the special features of the FDC. A Configure command need not be issued  
if the default values of the FDC meet the system requirements.  
Table 27 – Drive Control Delays (ms)  
HUT  
SRT  
2M  
64  
4
1M  
128  
8
500K 300K 250K  
2M  
4
3.75  
..  
0.5  
0.25  
1M  
8
7.5  
..  
1
0.5  
500K 300K 250K  
0
1
..  
E
F
256  
16  
426  
26.7  
..  
512  
32  
16  
15  
..  
26.7  
25  
32  
30  
..  
..  
..  
..  
..  
..  
56  
60  
112  
120  
224  
240  
373  
400  
448  
480  
2
3.33  
1.67  
4
1
2
HLT  
2M  
64  
0.5  
1
1M  
128  
1
500K  
256  
2
4
..  
300K  
426  
3.3  
250K  
512  
4
8
.
00  
01  
02  
..  
7F  
7F  
2
6.7  
..  
..  
..  
63  
63.5  
126  
127  
252  
254  
420  
423  
504  
508  
Configure Default Values:  
EIS - No Implied Seeks  
EFIFO - FIFO Disabled  
POLL - Polling Enabled  
FIFOTHR - FIFO Threshold Set to 1 Byte  
PRETRK - Pre-Compensation Set to Track 0  
EIS - Enable Implied Seek. When set to "1", the FDC will perform a Seek operation before executing a read or write  
command. Defaults to no implied seek.  
EFIFO - A "1" disables the FIFO (default). This means data transfers are asked for on a byte-by-byte basis. Defaults to  
"1", FIFO disabled. The threshold defaults to "1".  
POLL - Disable polling of the drives. Defaults to "0", polling enabled. When enabled, a single interrupt is generated  
after a reset. No polling is performed while the drive head is loaded and the head unload delay has not expired.  
FIFOTHR - The FIFO threshold in the execution phase of read or write commands. This is programmable from 1 to 16  
bytes. Defaults to one byte. A "00" selects one byte; "0F" selects 16 bytes.  
PRETRK - Pre-Compensation Start Track Number. Programmable from track 0 to 255. Defaults to track 0. A "00"  
selects track 0; "FF" selects track 255.  
Version  
The Version command checks to see if the controller is an enhanced type or the older type (765A). A value of 90 H is  
returned as the result byte.  
Relative Seek  
The command is coded the same as for Seek, except for the MSB of the first byte and the DIR bit.  
SMSC DS – LPC47M14X  
Page 57  
Rev. 05/02/2000  
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