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LPC47B27X 参数 Datasheet PDF下载

LPC47B27X图片预览
型号: LPC47B27X
PDF下载: 下载PDF文件 查看货源
内容描述: 100引脚增强型超级I / O控制器与LPC接口 [100 PIN ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE]
分类和应用: 控制器PC
文件页数/大小: 196 页 / 1189 K
品牌: SMSC [ SMSC CORPORATION ]
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FLOPPY DISK CONTROLLER  
The Floppy Disk Controller (FDC) provides the interface between a host microprocessor and the floppy disk drives. The  
FDC integrates the functions of the Formatter/Controller, Digital Data Separator, Write Precompensation and Data Rate  
Selection logic for an IBM XT/AT compatible FDC. The true CMOS 765B core guarantees 100% IBM PC XT/AT  
compatibility in addition to providing data overflow and underflow protection.  
The FDC is compatible to the 82077AA using  
SMSC's proprietary floppy disk controller core.  
FDC INTERNAL REGISTERS  
The Floppy Disk Controller contains eight internal registers which facilitate the interfacing between the host  
microprocessor and the disk drive. Table 2 shows the addresses required to access these registers. Registers other  
than the ones shown are not supported. The rest of the description assumes that the primary addresses have been  
selected.  
Table 2 - Status, Data and Control Registers  
(Shown with base addresses of 3F0 and 370)  
PRIMARY  
ADDRESS  
3F0  
SECONDARY  
ADDRESS  
370  
R/W  
R
REGISTER  
Status Register A (SRA)  
Status Register B (SRB)  
Digital Output Register (DOR)  
Tape Drive Register (TDR)  
Main Status Register (MSR)  
Data Rate Select Register (DSR)  
Data (FIFO)  
3F1  
371  
R
3F2  
372  
R/W  
R/W  
R
3F3  
373  
3F4  
374  
3F4  
374  
W
3F5  
375  
R/W  
3F6  
376  
Reserved  
3F7  
377  
R
Digital Input Register (DIR)  
Configuration Control Register (CCR)  
3F7  
377  
W
STATUS REGISTER A (SRA)  
Address 3F0 READ ONLY  
This register is read-only and monitors the state of the internal interrupt signal and several disk interface  
pins in PS/2 and Model 30 modes. The SRA can be accessed at any time when in PS/2 mode. In the PC/AT mode the  
data bus pins D0 - D7 are held in a high impedance state for a read of address 3F0.  
PS/2 Mode  
7
INT  
6
5
4
3
2
1
0
nDRV2 STEP nTRK0 HDSEL nINDX nWP  
DIR  
PENDING  
0
RESET  
COND.  
1
0
N/A N/A N/A  
0
0
BIT 0 DIRECTION  
Active high status indicating the direction of head movement. A logic "1" indicates inward direction; a logic "0" indicates  
outward direction.  
BIT 1 nWRITE PROTECT  
Active low status of the WRITE PROTECT disk interface input. A logic "0" indicates that the disk is write protected.  
BIT 2 nINDEX  
Active low status of the INDEX disk interface input.  
BIT 3 HEAD SELECT  
Active high status of the HDSEL disk interface input. A logic "1" selects side 1 and a logic "0" selects side 0.  
SMSC LPC47B27x  
- 23 -  
Rev. 08-10-04  
DATASHEET  
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