Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
PIN / DEFAULT
VALUE
STRAP NAME
DESCRIPTION
duplex_strap_1
Port 1 Duplex Select Strap: Configures the default value
for the Duplex Mode (PHY_DUPLEX) bit in the
PHY_BASIC_CTRL_1 register (See Section 13.2.2.1).
When configured low, half-duplex is selected. When
configured high, full-duplex is selected.
DUPLEX_1
This strap also affects the default value of the following bits:
PHY_DUPLEX bit of the Port x PHY Basic Control
Register (PHY_BASIC_CONTROL_x)
10BASE-T Full Duplex (bit 6) of the Port x PHY Auto-
Negotiation Advertisement Register (PHY_AN_ADV_x)
MODE[2:0] bits of the Port x PHY Special Modes Register
(PHY_SPECIAL_MODES_x)
Refer to the respective register definition sections for
additional information.
BP_EN_strap_1
FD_FC_strap_1
Port 1 Backpressure Enable Strap: Configures the
default value for the Port 1 Backpressure Enable
(BP_EN_1) bit of the Port 1 Manual Flow Control Register
(MANUAL_FC_1). When configured low, backpressure is
disabled. When configured high, backpressure is enabled.
BP_EN_1
FD_FC_1
Port 1 Full-Duplex Flow Control Enable Strap:
Configures the default value of the Port 1 Full-Duplex
Transmit Flow Control Enable (TX_FC_1) and Port 1 Full-
Duplex Receive Flow Control Enable (RX_FC_1) bits in the
Port 1 Manual Flow Control Register (MANUAL_FC_1),
which are used when manual full-duplex control is selected.
When configured low, full-duplex Pause packet detection
and generation are disabled. When configured high, full-
duplex Pause packet detection and generation are enabled.
manual_FC_strap_1
Port 1 Manual Flow Control Enable Strap: Configures the
default value of the Port 1 Full-Duplex Manual Flow Control
Select (MANUAL_FC_1) bit in the Port 1 Manual Flow
Control Register (MANUAL_FC_1). When configured low,
flow control is determined by auto-negotiation (if enabled),
and symmetric PAUSE is advertised (bit 10 of the Port x
PHY Auto-Negotiation Advertisement Register
MANUAL_FC_1
(PHY_AN_ADV_x) is set).
When configured high, flow control is determined by the
Port 1 Full-Duplex Transmit Flow Control Enable
(TX_FC_1) and Port 1 Full-Duplex Receive Flow Control
Enable (RX_FC_1) bits, and symmetric PAUSE is not
advertised (bit 10 of the Port x PHY Auto-Negotiation
Advertisement Register (PHY_AN_ADV_x) is cleared).
auto_mdix_strap_2
Port 2 Auto-MDIX Enable Strap: Configures the default
value for the Auto-MDIX functionality on Port 2 when the
AMDIXCTL bit in the Port x PHY Special Control/Status
Indication Register
AUTO_MDIX_2
(PHY_SPECIAL_CONTROL_STAT_IND_x) is cleared.
When configured low, Auto-MDIX is disabled. When
configured high, Auto-MDIX is enabled.
Note:
If AMDIXCTL is set, this strap had no effect.
manual_mdix_strap_2
SMSC LAN9313/LAN9313i
Port 2 Manual MDIX Strap: Configures MDI(0) or MDIX(1)
for Port 2 when the auto_mdix_strap_2 is low and the
AMDIXCTL bit of the Port x PHY Special Control/Status
Indication Register
0b
(PHY_SPECIAL_CONTROL_STAT_IND_x) is cleared.
DATA4S7HEET
Revision 1.2 (04-08-08)
SMSC [ SMSC CORPORATION ]
