Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Table 4.1 Reset Sources and Affected LAN9313/LAN9313i Circuitry
RESET SOURCE
POR
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
nRST Pin
Digital Reset
Port 2 PHY
Port 1 PHY
Virtual PHY
X
X
X
4.2.1
Chip-Level Resets
A chip-level reset event activates all internal resets, effectively resetting the entire LAN9313/LAN9313i.
Configuration straps are latched, and the EEPROM Loader is run as a result of chip-level resets. A
chip-level reset is initiated by assertion of any of the following input events:
Power-On Reset (POR)
nRST Pin Reset
Chip-level reset/configuration completion can be determined by first polling the Byte Order Test
Register (BYTE_TEST). The returned data will be invalid until the serial interface resets are complete.
Once the returned data is the correct byte ordering value, the serial interface resets have completed.
The completion of the entire chip-level reset must then be determined by polling the READY bit of the
Hardware Configuration Register (HW_CFG) until it is set. When set, the READY bit indicates that the
reset has completed and the device is ready to be accessed.
With the exception of the Hardware Configuration Register (HW_CFG), Byte Order Test Register
(BYTE_TEST), and Reset Control Register (RESET_CTL), read access to any internal resources is
forbidden while the READY bit is cleared. Writes to any address are invalid until the READY bit is set.
4.2.1.1
Power-On Reset (POR)
A power-on reset occurs whenever power is initially applied to the LAN9313/LAN9313i, or if the power
is removed and reapplied to the LAN9313/LAN9313i. This event resets all circuitry within the device.
Configuration straps are latched, and the EEPROM Loader is run as a result of this reset.
A POR reset typically takes approximately 23mS, plus additional time (91uS for I2C, 28uS for
Microwire) per byte of data loaded from the EEPROM via the EEPROM Loader. A full EEPROM load
(64KB for I2C, 2KB for Microwire) will complete in approximately 6.0 seconds for I2C EEPROM, and
80mS for Microwire EEPROM.
Revision 1.2 (04-08-08)
SMSC LAN9313/LAN9313i
DATA4S2HEET
SMSC [ SMSC CORPORATION ]
