16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Table 2.5 System and Power Signals
PIN
NO.
BUFFER
TYPE
NUM
PINS
NAME
SYMBOL
DESCRIPTION
6
Crystal 1, Clock In
XTAL1/CLKIN
lclk
1
External 25MHz Crystal Input. This
pin can also be connected to single-
ended TTL oscillator (CLKIN). If this
method is implemented, XTAL2
should be left unconnected.
5
Crystal 2
Reset
XTAL2
Oclk
1
1
External 25MHz Crystal output.
95
nRESET
IS
(PU)
Active-low reset input. Resets all logic
and registers within the LAN9217.
This signal is pulled high with a weak
internal pull-up resistor. If nRESET is
left unconnected, the LAN9217 will
rely on its internal power-on reset
circuitry.
Note:
The LAN9217 must always
be read at least once after
power-up, reset, or upon
return from a power-saving
state or write operations will
not function. See Section
3.10, "Detailed Reset
Description," on page 39 for
additional information
70
Wakeup Indicator
PME
O8/OD8
1
When programmed to do so, is
asserted when the LAN9217 detects
a wake event and is requesting the
system to wake up from the
associated sleep state. The polarity
and buffer type of this signal is
programmable.
Note:
Detection of a Power
Management Event, and
assertion of the PME signal
will not wakeup the
LAN9217. The LAN9217
will only wake up when it
detects a host write cycle
(assertion of nCS and
nWR). Although any write to
the LAN9217, regardless of
the data written, will wake-
up the device when it is in a
power-saving mode, it is
required that the
BYTE_TEST register be
used for this purpose.
73
Auto-MDIX Enable
AMDIX_EN
I
1
Enables Auto-MDIX. Pull high enable
Auto-MDIX, pull low or leave
unconnected to disable Auto-MDIX.
(PD)
SMSC LAN9217
17
Revision 1.8 (06-06-07)
DATASHEET
SMSC [ SMSC CORPORATION ]
