16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
Table 2.6 MII Interface Signals
PIN
NO.
BUFFER
TYPE
NUM
PINS
NAME
SYMBOL
DESCRIPTION
31
Management Data
Clock
MDC
O8 (PD)
1
Management Data Clock: When
SMI_SEL = 1, this pin is the MII
management data clock. When
SMI_SEL=0, this pin is driven low.
Note:
See Section 5.3.9,
"HW_CFG—Hardware
Configuration Register" for
more information on
SMI_SEL.
Note 2.2 Pins RXD[3:1] provide internal pull-down resistors to prevent these pins from floating when
unused. RXD0 (pin 75) does not provide an internal pull-down resistor. This pin must be
pulled or driven to a valid state at all times.
Note 2.3 The external SMI port is selected when SMI_SEL = 1. When SMI_SEL = 0, MDIO is tri-
stated and MDC is driven low.
2.1
Buffer Types
Table 2.7 Buffer Types
TYPE
DESCRIPTION
Input pin
I
Schmitt triggered Input
IS
Output with 12mA sink and 12mA source
Open-drain output with 12mA sink
I/O with 8mA symmetrical drive
Open-drain output with 8mA sink
Output 8mA symmetrical drive
50uA (typical) internal pull-up
50uA (typical) internal pull-down
Analog input
O12
OD12
IO8
OD8
O8
PU
PD
AI
Analog output
AO
Analog bi-directional
AIO
ICLK
OCLK
Crystal oscillator input pin
Crystal oscillator output pin
SMSC LAN9217
21
Revision 1.8 (06-06-07)
DATASHEET
SMSC [ SMSC CORPORATION ]
