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LAN9210 参数 Datasheet PDF下载

LAN9210图片预览
型号: LAN9210
PDF下载: 下载PDF文件 查看货源
内容描述: 外形小巧单芯片以太网控制器与HP Auto-MDIX的 [Small Form Factor Single- Chip Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网
文件页数/大小: 458 页 / 4618 K
品牌: SMSC [ SMSC CORPORATION ]
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface  
Datasheet  
Table 4.3 Hard-Strap Configuration Strap Definitions  
STRAP NAME  
DESCRIPTION  
PIN  
eeprom_type_strap  
EEPROM Type Strap: Configures the EEPROM type.  
EEPROM_TYPE  
0 = Microwire Mode  
1 = I2C Mode  
EEPROM_SIZE_[1:0]  
PHY_ADDR_SEL  
eeprom_size_strap[1:0]  
phy_addr_sel_strap  
EEPROM Size Strap [1:0]: Configures the EEPROM size  
range as specified in Section 10.2, "I2C/Microwire Master  
EEPROM Controller," on page 137.  
PHY Address Select Strap: Configures the default MII  
management address values for the PHYs and Virtual PHY  
as detailed in Section 7.1.1, "PHY Addressing," on page 82.  
0
1
0
1
1
2
2
3
4.3  
Power Management  
The LAN9312 Port 1 and Port 2 PHYs and the Host MAC support several power management and  
wakeup features.  
The LAN9312 can be programmed to issue an external wake signal (PME) via several methods,  
including wake on LAN, wake on link status change (energy detect), and magic packet wakeup. The  
PME signal is ideal for triggering system power-up using remote Ethernet wakeup events. A simplified  
diagram of the logic that controls the PME and PME_INT signals can be seen in Figure 4.1.  
The PME module handles the latching of the Port 1 & 2 PHY Energy-Detect Status (ED_STS1 and  
ED_STS2) and Wake-On LAN Status (WOL_STS) bits of the Power Management Control Register  
(PMT_CTRL). This module also masks the status bits with the corresponding enable bits (ED_EN1,  
ED_EN2, WOL_EN) and combines the results together to generate the PME_INT status bit in the  
Interrupt Status Register (INT_STS). The PME_INT status bit is then masked with the PME_EN bit and  
conditioned before becoming the PME output pin.  
The PME output characteristics can be configured via the PME_TYPE, PME_IND, and PME_POL bits  
of the Power Management Control Register (PMT_CTRL). These bits allow the PME to be open-drain,  
active high push-pull, or active-low push-pull and configure the output to be continuous, or pulse for  
50mS.  
Revision 1.2 (04-08-08)  
SMSC LAN9312  
DATA4S6HEET