High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.4.2
Buffer Manager Drop Level Register (BM_DROP_LVL)
Register #:
1C01h
Size:
32 bits
This register configures the overall buffer usage limits.
BITS
DESCRIPTION
TYPE
DEFAULT
31:16
15:8
RESERVED
RO
-
Drop Level Low
R/W
49h
These bits specify the buffer limit that can be used per ingress port during
times when 2 or 3 ports are active.
Each buffer is 128 bytes.
Note:
A port is “active” when 36 buffers are in use for that port.
7:0
Drop Level High
R/W
64h
These bits specify the buffer limit that can be used per ingress port during
times when 1 port is active.
Each buffer is 128 bytes.
Note:
A port is “active” when 36 buffers are in use for that port.
SMSC LAN9312
413
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
