High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
BITS
DESCRIPTION
TYPE
DEFAULT
10:9
Source Port B
RC
00b
When bit 8 is set, these bits indicate the source port on which the packet
was dropped.
00 = Port 0
01 = Port 1
10 = Port 2
11 = RESERVED
8
Set B Valid
RC
RC
0b
0h
When set, bits 14:9 are valid.
7:4
Drop Reason A
When bit 1 is set, these bits indicate the reason a packet was dropped. See
the Drop Reason B description above for definitions of each value of this
field.
3:2
Source port A
RC
00b
When bit 1 is set, these bits indicate the source port on which the packet
was dropped.
00 = Port 0
01 = Port 1
10 = Port 2
11 = RESERVED
1
0
Set A Valid
RC
RC
0b
0b
When set, bits 7:2 are valid.
Interrupt Pending
When set, a packet dropped event(s) is indicated.
SMSC LAN9312
411
Revision 1.2 (04-08-08)
DATASHEET