High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.4.4
Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL)
Register #:
1C03h
Size:
32 bits
This register configures the buffer usage level when a Pause frame with a pause value of 1 is sent.
BITS
DESCRIPTION
TYPE
DEFAULT
31:16
15:8
RESERVED
RO
-
Resume Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
R/W
03h
Each buffer is 128 bytes.
Note:
A port is “active” when 36 buffers are in use for that port.
7:0
Resume Level High
These bits specify the buffer usage level during times when 0 or 1 ports are
active.
R/W
07h
Each buffer is 128 bytes.
Note:
A port is “active” when 36 buffers are in use for that port.
SMSC LAN9312
415
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
