High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.4.2.13 Port x PHY Special Control/Status Register (PHY_SPECIAL_CONTROL_STATUS_x)
Index (decimal): 31
Size:
16 bits
This read/write register is used to control and monitor various options of the Port x PHY.
BITS
DESCRIPTION
TYPE
DEFAULT
15:13
12
RESERVED
Autodone
RO
RO
-
0b
This bit indicates the status of the Auto-Negotiation on the Port x PHY.
0: Auto-Negotiation is not completed, is disabled, or is not active
1: Auto-Negotiation is completed
11:5
4:2
RESERVED
RO
RO
-
Speed Indication
This field indicates the current Port x PHY speed configuration.
000b
STATE
000
001
010
011
DESCRIPTION
RESERVED
10BASE-T Half-duplex
100BASE-TX Half-duplex
RESERVED
100
101
110
RESERVED
10BASE-T Full-duplex
100BASE-TX Full-duplex
RESERVED
111
1:0
RESERVED
R/W
0b
SMSC LAN9312
307
Revision 1.2 (04-08-08)
DATASHEET