Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
nAS to nAEN/nAS
68000 Address<23:1> to 91C96 Address Bus
DATA to DATA (Upper and lower bytes swapped)
Interrupt (if used) to INT0
The following signals MUST be pulled as stated:
LAN91C96 Address bit 0 tied low
LAN91C96 nSBHE input tied low
All INTx must have a 1KΩ to 10KΩ pull-up to keep the line high while the drivers are tri-stated.
16 BITS
IOS2-0
WORD ADDRESS
000
0h
CONFIGURATION REG.
BASE REG.
1h
001
010
011
4h
5h
CONFIGURATION REG.
BASE REG.
8h
9h
CONFIGURATION REG.
BASE REG.
Ch
Dh
CONFIGURATION REG.
BASE REG.
100
101
110
10h
11h
CONFIGURATION REG.
BASE REG.
14h
15h
CONFIGURATION REG.
BASE REG.
18h
19h
CONFIGURATION REG.
BASE REG.
XXX
20h
21h
22h
IA0-1
IA2-3
IA4-5
FIGURE 10.1 - 64 X 16 SERIAL EEPROM MAP
SMSC DS – LAN91C965v&3v
Page 91
Rev. 09/10/2004
DATASHEET
SMSC [ SMSC CORPORATION ]
