Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
I/O SPACE - BANK 3
OFFSET
0 THROUGH 7
NAME
MULTICAST TABLE
TYPE
READ/WRITE
SYMBOL
MT
Multicast Table 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Multicast Table 1
0
0
Multicast Table 2
0
0
Multicast Table 3
0
0
Multicast Table 4
0
0
Multicast Table 5
0
0
Multicast Table 6
0
0
Multicast Table 7
0
0
The 64 bit multicast table is used for group address filtering. The hash value is defined as the six most
significant bits of the CRC of the destination addresses. The three msb's determine the register to be used
(MT0-7), while the other three determine the bit within the register. If the appropriate bit in the table is set,
the packet is received.
If the ALMUL bit in the RCR register is set, all multicast addresses are received regardless of the multicast
table values. Hashing is for a partial group address filtering scheme. Additional filtering is done in
software. But the hash value being a part of the receive status word, the receive routine can reduce the
search time significantly. With the proper memory structure, the search is limited to comparing only the
multicast addresses that have the actual hash value in question.
I/O SPACE - BANK3
OFFSET
8
NAME
TYPE
READ/WRITE
SYMBOL
MGMT
MANAGEMENT INTERFACE
This register contains status bits and control bits for management of different transceivers modules. Some
of the pins are shared with the serial EEPROM interface. Management is software controlled, and does not
use the serial EEPROM and the transceiver management functions at the same time.
nXNDEC
IOS2
IOS1
IOS0
0
0
0
0
1
1
1
1
MDOE
0
MCLK
0
MDI
0
MD0
0
Rev. 09/10/2004
Page 62
SMSC LAN91C965v&3v
DATASHEET
SMSC [ SMSC CORPORATION ]
