Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
nXNDEC - Read only bit reflecting the status of the nXENDEC pin.
IOS0-2 - Read only bits reflecting the status of the IOS0-2 pins.
MDO - The value of this bit drives the EEDO pin when MDOE=1.
MDCLK - The value of this bit drives the EESK pin when MDOE=1.
MDOE - When this bit is high pins EEDO EECS and EESK will be used for transceiver management
functions, otherwise the pins assume the EEPROM values.
MODE=0
MODE=1
Bit MDO
Bit MCLK
0
EEDO
EESK
EECS
Serial EEPROM Data Out
Serial EEPROM Clock
Serial EEPROM Chip Select
I/O SPACE - BANK3
OFFSET
A
NAME
REVISION REGISTER
TYPE
READ ONLY
SYMBOL
REV
0
0
0
1
1
0
1
0
0
1
0
1
0
1
1
CHIP
REV
0
CHIP ID VALUE
DEVICE
LAN91C90/LAN91C92
LAN91C94
3
4
5
LAN91C95
4
LAN91C96
(Note 7.2)
7
8
9
LAN91C100
LAN91C100FD
LAN91C110
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
Note 7.2
The LAN91C96 shares the same chip ID (#4) as the LAN91C94. The Rev. ID for the LAN91C96 will begin
from six (#6).
SMSC DS – LAN91C965v&3v
Page 63
Rev. 09/10/2004
DATASHEET
SMSC [ SMSC CORPORATION ]
