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FDC37CXFR 参数 Datasheet PDF下载

FDC37CXFR图片预览
型号: FDC37CXFR
PDF下载: 下载PDF文件 查看货源
内容描述: 即插即用兼容超I / O控制器,提供快速IR [Plug and Play Compatible Ultra I/O Controller with Fast IR]
分类和应用: 控制器
文件页数/大小: 258 页 / 898 K
品牌: SMSC [ SMSC CORPORATION ]
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Table 41 - ECP Pin Descriptions  
DESCRIPTION  
NAME  
nStrobe  
TYPE  
O
During write operations nStrobe registers data or address into the slave  
on the asserting edge (handshakes with Busy).  
PData 7:0  
nAck  
I/O  
I
Contains address or data or RLE data.  
Indicates valid data driven by the peripheral when asserted. This signal  
handshakes with nAutoFd in reverse.  
PeriphAck (Busy)  
I
I
This signal deasserts to indicate that the peripheral can accept data.  
This signal handshakes with nStrobe in the forward direction. In the  
reverse direction this signal indicates whether the data lines contain  
ECP command information or data. The peripheral uses this signal to  
flow control in the forward direction. It is an "interlocked" handshake  
with nStrobe. PeriphAck also provides command information in the  
reverse direction.  
PError  
Used to acknowledge a change in the direction the transfer (asserted =  
(nAckReverse)  
forward).  
nReverseRequest.  
The peripheral drives this signal low to acknowledge  
It is an "interlocked" handshake with  
nReverseRequest. The host relies upon nAckReverse to determine  
when it is permitted to drive the data bus.  
Select  
I
Indicates printer on line.  
nAutoFd  
O
Requests a byte of data from the peripheral when asserted,  
(HostAck)  
handshaking with nAck in the reverse direction. In the forward direction  
this signal indicates whether the data lines contain ECP address or  
data. The host drives this signal to flow control in the reverse direction.  
It is an "interlocked" handshake with nAck. HostAck also provides  
command information in the forward phase.  
nFault  
(nPeriphRequest)  
I
Generates an error interrupt when asserted. This signal provides a  
mechanism for peer-to-peer communication. This signal is valid only in  
the forward direction. During ECP Mode the peripheral is permitted  
(but not required) to drive this pin low to request a reverse transfer. The  
request is merely a "hint" to the host; the host has ultimate control over  
the transfer direction. This signal would be typically used to generate  
an interrupt to the host CPU.  
nInit  
O
O
Sets the transfer direction (asserted = reverse, deasserted = forward).  
This pin is driven low to place the channel in the reverse direction. The  
peripheral is only allowed to drive the bi-directional data bus while in  
ECP Mode and HostAck is low and nSelectIn is high.  
nSelectIn  
Always deasserted in ECP mode.  
97  
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