PARALLEL PORT
The FDC37N3869 incorporates an IBM XT/AT compatible parallel port. The FDC37N3869 supports the optional PS/2
type bi-directional parallel port (SPP), the Enhanced Parallel Port (EPP) and the Extended Capabilities Port (ECP)
parallel port modes. Refer to the FDC37N3869 Configuration Registers and the following hardware configuration
description for information on disabling, powering down, changing the base address, and selecting the mode of
operation of the parallel port.
The FDC37N3869 also incorporates SMSC’s ChiProtect circuitry, which prevents possible damage to the parallel port
due to printer power-up.
The functionality of the Parallel Port is achieved through the use of eight addressable ports, with their associated
registers and control gating. The control and data port are read/write by the CPU, the status port is read/write in the
EPP mode. The address map and bit encoding of the Parallel Port registers is shown in Table 59; the Parallel Port
Connector is shown in Table 63.
Table 59 - Parallel Port Registers
BASE
ADDRESS
OFFSET
00H
01H
D0
PD0
TMOUT
D1
PD1
0
D2
PD2
0
D3
PD3
nERR SLCT
D4
PD4
D5
PD5
PE
D6
PD6
nACK nBUSY
0
D7
PD7
DATA PORT1
STATUS PORT1
CONTROL PORT1
02H
STROB AUTOFD nINIT
SLC
PD3
PD3
PD3
PD3
PD3
IRQE
PD4
PD4
PD4
PD4
PD4
PCD
0
E
EPP ADDR
PORT2,3
03H
04H
05H
06H
07H
PD0
PD0
PD0
PD0
PD0
PD1
PD1
PD1
PD1
PD1
PD2
PD2
PD2
PD2
PD2
PD5
PD5
PD5
PD5
PD5
PD6
PD6
PD6
PD6
PD6
AD7
PD7
PD7
PD7
PD7
EPP DATA PORT
02,3
EPP DATA PORT
12,3
EPP DATA PORT
22,3
EPP DATA PORT
32,3
Note1: These registers are available in all modes.
Note2: These registers are only available in EPP mode.
Note3: For EPP mode, IOCHRDY must be connected to the ISA bus.
SMSC DS – FDC37N3869
Page 70
Rev. 10/25/2000
SMSC [ SMSC CORPORATION ]
