Table 54 - Chip Level Registers
DESCRIPTION
REGISTER
TEST 4
ADDRESS
STATE
0x2B R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired
results.
C
Default = 0x00, on
Vcc POR
TEST 5
0x2C R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired
results.
C
C
Default = 0x00, on
Vcc POR
TEST 1
0x2D R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired
results.
Default = 0x00, on
Vcc POR
TEST 2
0x2E R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired
results.
C
C
Default = 0x00, on
Vcc POR
TEST 3
0x2F R/W Test Modes: Reserved for SMSC. Users should not
write to this register, may produce undesired
results.
Default = 0x00, on
Vcc POR
Note 1: To allow the selection of the configuration address to a user defined location, these
Configuration Address Bytes are used. There is no restriction on the address chosen, except that A0
is 0, that is, the address must be on an even byte boundary. As soon as both bytes are changed, the
configuration space is moved to the specified location with no delay (Note: Write byte 0, then byte 1;
writing CR27 changes the base address).
The configuration address is only reset to its default address upon a Hard Reset or Vcc POR.
Note: The default configuration address is either 3F0 or 370, as specified by the SYSOPT pin.
130
SMSC [ SMSC CORPORATION ]
