Table 55 - Logical Device Registers
ADDRESS DESCRIPTION
LOGICAL DEVICE
REGISTER
STATE
Interrupt Select
(0x70,0x72) 0x70 is implemented for each logical device.
Refer to Interrupt Configuration Register
description. Only the keyboard controller
uses Interrupt Select register 0x72. Unused
register (0x72) will ignore writes and return
zero when read. Interrupts default to edge
high (ISA compatible).
C
Defaults :
0x70 = 0x00,
on Vcc POR or
Reset_Drv
0x72 = 0x00,
on Vcc POR or
Reset_Drv
(0x71,0x73) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
DMA Channel Select
(0x74,0x75) Only 0x74 is implemented for FDC, Serial
C
Port 2 and Parallel port.
0x75 is not
Default = 0x04
on Vcc POR or
Reset_Drv
implemented and ignores writes and returns
zero when read. Refer to DMA Channel
Configuration.
32-Bit Memory Space
Configuration
(0x76-0xA8) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
Logical Device
(0xA9-0xDF) Reserved - not implemented. These register
locations ignore writes and return zero when
read.
C
C
C
Logical Device
Configuration
(0xE0-0xFE) Reserved - Vendor Defined (see SMSC
defined
Logical
Device
Configuration
Registers).
Reserved
0xFF
Reserved
Note 1: A logical device will be active and powered up according to the following equation:
DEVICE ON (ACTIVE) = (Activate Bit SET or Pwr/Control Bit SET).
The Logical device's Activate Bit and its Pwr/Control Bit are linked such that setting or clearing one
sets or clears the other. If the I/O Base Addr of the logical device is not within the Base I/O range as
shown in the Logical Device I/O map, then read or write is not valid and is ignored.
132
SMSC [ SMSC CORPORATION ]
