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FDC37B78X_07 参数 Datasheet PDF下载

FDC37B78X_07图片预览
型号: FDC37B78X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 超级I / O控制器,支持ACPI ,实时时钟和消费性红外端口 [Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR]
分类和应用: 控制器时钟
文件页数/大小: 249 页 / 865 K
品牌: SMSC [ SMSC CORPORATION ]
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Auxiliary I/O, Logical Device 8  
TABLE 83 - AUXILLIARY I/O, LOGICAL DEVICE 8 [LOGICAL DEVICE NUMBER = 0X08]  
NAME  
Soft Power Enable  
Register 1  
REG INDEX  
0xB0 R/W  
DEFINITION  
STATE  
The following bits are the enables for the wake-up  
function of the nPowerOn bit. When enabled,  
these bits allow their corresponding function to turn  
on power to the system.  
C
Default = 0x00  
on Vbat POR  
1 = ENABLED  
0 = DISABLED  
Bit[0] SP_RI1: UART 1 Ring Indicator Pin  
Bit[1] SP_RI2: UART 2 Ring Indicator Pin  
Bit[2] SP_KCLK: Keyboard Clock pin  
Bit[3] SP_MCLK: Mouse Clock pin  
Bit[4] SP_GPINT1: Group Interrupt 1  
Bit[5] SP_GPINT2: Group Interrupt 2  
Bit[6] SP_IRRX2: IRRX2 input pin  
Bit[7] SP_RTC ALARM: RTC Alarm  
The following bits are the enables for the wake-up  
function of the nPowerOn bit. When enabled,  
these bits allow their corresponding function to turn  
on power to the system.  
Soft Power Enable  
Register 2  
0xB1 R/W  
C
Default = 0x80  
on Vbat POR  
1 = ENABLED  
0 = DISABLED  
Bit[0] SP_RXD1: UART 1 Receive Data Pin  
Bit[1] SP_RXD2: UART 2 Receive Data Pin  
Bit[2] Reserved  
Bit[3] RING Enable bit “RING_EN”  
0=Disable.  
1=Enable ring indicator on nRING pin as wakeup  
function to activate nPowerOn.  
Bit[4] Reserved  
Bit[5] CIR Enable bit “CIR_EN”  
0=Disable.  
1=Enable CIR wakeup event to activate nPowerOn  
Bit[6] Reserved  
Bit[7] OFF_EN: After power up, this bit defaults to 1,  
i.e., enabled. This bit allows the software to enable  
or disable the button control of power off.  
194  
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