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FDC37B78X_07 参数 Datasheet PDF下载

FDC37B78X_07图片预览
型号: FDC37B78X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 超级I / O控制器,支持ACPI ,实时时钟和消费性红外端口 [Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR]
分类和应用: 控制器时钟
文件页数/大小: 249 页 / 865 K
品牌: SMSC [ SMSC CORPORATION ]
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NAME  
Soft Power Status  
Register 1  
REG INDEX  
0xB2 R/W  
DEFINITION  
STATE  
The following bits are the status for the wake-up  
function of the nPowerOn bit. These indicate which  
of the enabled wakeup functions caused the power  
up.  
C
Default = 0x00  
on Vbat POR  
1 = Occured  
0 = Did not occur since last cleared  
The following signals are latched to detect and hold  
the soft power event (Type 1) (Note 1)  
Bit[0] RI1: UART 1 Ring Indicator; high to low  
transition on the pin, cleared by a read of this  
register  
Bit[1] RI2: UART 2 Ring Indicator; high to low  
transition on the pin, cleared by a read of this  
register  
Bit[2] KCLK: Keyboard clock; high to low transition  
on the pin, cleared by a read of this register  
Bit[3] MCLK: Mouse clock; high to low transition on  
the pin, cleared by a read of this register  
Bit[6] IRRX2: IRRX2 input; high to low transition on  
the pin, cleared by a read of this register  
Bit[7] RTC ALARM: RTC Alarm; status of the RTC  
Alarm internal signal. Cleared by a read of the  
status register.  
The following signals are not latched to detect and  
hold the soft power event (Type 2) (Note 1)  
Bit[4] GPINT1: Group Interrupt 1; status of the  
GPINT1 internal signal. Cleared at the source  
Bit[5] GPINT2: Group Interrupt 2; status of the  
GPINT2 internal signal. Cleared at the source  
195  
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