HARD
RESET
VCC
POR
SOFT
RESET
VTR
POR
INDEX
TYPE
CONFIGURATION REGISTER
Reserved
0xF6 :
FB
-
-
-
-
Note 1: This register contains some bits that are read or write only.
Note 2: Bit 0 is not cleared by HARD RESET.
Note 3: CR22 bit 5 and bit 7 are reset by VTR POR, only.
Chip Level (Global) Control/Configuration
Registers[0x00-0x2F]
The INDEX PORT is used to select
a
configuration register in the chip. The DATA
PORT is then used to access the selected
register. These registers are accessible only in
the Configuration Mode.
The chip-level (global) registers lie in the
address range [0x00-0x2F]. The design MUST
use all 8 bits of the ADDRESS Port for register
selection. All unimplemented registers and bits
ignore writes and return zero when read.
Table 53 - Chip Level Registers
ADDRESS DESCRIPTION
REGISTER
STATE
Chip (Global) Control Registers
0x00 -
0x01
Reserved - Writes are ignored, reads return 0.
Config Control
0x02 W
The hardware automatically clears this bit after the
write, there is no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to the "Configuration
Registers" table for the soft reset value for each
register.
C
Default = 0x00
on Vcc POR or
Reset_Drv
136
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