NAME
REG INDEX
DEFINITION
interrupts. See bits 2,7 of this register.
Note 2: If set, the BIOS buffer is disabled. Also, the
SER_IRQ and PCI_CLK pins are disabled,
and these pins function as IRQ15 and IRQ14,
respectively.
STATE
Note 3: Select IRQ9 below. Select SCI below. Select
nSMI through the SMI register.
Bit[1] Reserved
Bit[2] SCI Select
0=SCI is on serial IRQ frame
1=SCI is on IRQx pin
Bit[3] SCI Polarity Select (EN1)
0=SCI active low
1=SCI active high
Bit[4] SCI Buffer Type (EN1)
0=Push-pull
1=Open drain
Bit[6:5] SCI/PME/IRQ9 Pin select
00=Pin 21 is used for PME# signal.
01=Pin 21 is used for SCI.
10=Pin 21 is used for IRQ9.
11=Reserved
Note: If bit 5 is set, this overrides the setting of the
IRQ for SCI in Config Register 0x70 of Logical
Device A. See the logic in the SCI section.
Note: This bit selects the buffer type of the pin as
follows: if PME#is selected, it is active low OD; if SCI
is selected, the buffer type and polarity are selected
through bits 3 and 4 of this register; if IRQ9 is
selected, it is an active high push-pull output.
Bit[7] SMI Select
0=SMI is on serial IRQ frame (IRQ2)
1=SMI is on nSMI pin
Engineering Note: the polarity and buffer type of the
SMI pin is selected through the GPIO registers
(default is active low open drain).
Forced Disk Change
0xC1 R/W
Force Change 1 and Force Change 0 can be
written to 1 are not clearable by software.
Force Change 1 is cleared on (nSTEP AND nDS1)
Force Change 0 is cleared on (nSTEP AND nDS0).
DSK CHG (Floppy DIR Register, Bit 7) = (nDS0
AND Force Change 0) OR (nDS1 AND Force
Change 1) OR nDSKCHG.
Default = 0x03
on VTR POR
Setting either of the Force Disk Change bits active
(1) forces the FDD nDSKCHG input active when
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