NAME
REG INDEX
DEFINITION
STATE
machine will power-up as soon as a VTR POR
occurs. Software must not set VTR_POR_OFF and
VTR_POR_EN at the same time.
0=the nPowerOn pin will remain in the state it was in
prior to the VTR POR (unless the VTR_POR_OFF
bit is set).
Bit[7] OFF_EN: After power up, this bit defaults to 1,
i.e., enabled. This bit allows the software to enable
or disable the button control of power off.
The following bits are the status for the wake-up
function of the nPowerOn bit. These indicate which
of the enabled wakeup functions caused the power
up.
Soft Power Status
Register 1
0xB2 R/W
C
Default = 0x00
on Vbat POR
1 = Occurred
0 = Did not occur since last cleared
The following signals are latched to detect and hold
the soft power event (Type 1) (Note 1)
Bit[0] RI1: UART 1 Ring Indicator; high to low
transition on the pin, cleared by a read of
this register
Bit[1] RI2: UART 2 Ring Indicator; high to low
transition on the pin, cleared by a read of
this register
Bit[2] KDAT: Keyboard data; high to low transition
on the pin, cleared by a read of this
register
Bit[3] MDAT: Mouse data; high to low transition on
the pin, cleared by a read of this register
Bit[6] IRRX2: IRRX2 input; high to low transition on
the pin, cleared by a read of this register
Bit[7] Reserved
The following signals are not latched to detect and
hold the soft power event (Type 2) (Note 1)
Bit[4] GPINT1: Group Interrupt 1; status of the
GPINT1 internal signal. Cleared at the
source
Bit[5] GPINT2: Group Interrupt 2; status of the
GPINT2 internal signal. Cleared at the
source
Soft Power Status
Register 2
0xB3 R/W
The following bits are the status for the wake-up
function of the nPowerOn bit. These indicate
which of the enabled wakeup functions caused the
power up.
C
Default = 0x00
on Vbat POR
1 = Occurred
0 = Did not occur since last cleared
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SMSC [ SMSC CORPORATION ]
