NAME
Register
REG INDEX
DEFINITION
STATE
ring indicator on the nRI1, nRI2 and nRING pins. It
also contains bits to select crystal load capacitance
and P17/P12 function.
Default = 0x00 on
Vbat POR
Bit[0]: 1=Enable detection of pulse train of
frequency 15Hz or higher for 200msec and
generate an active low pulse for its duration to use
as the ring indicator function on nRING pin. The
leading high-to-low edge is the trigger for the ring
indication.
Note 3
0=Ring indicate function is high-to-low transition on
the nRING pin.
Bit[1]: 1=Enable detection of pulse train of
frequency 15Hz or higher and generate an active
low pulse for its duration to use for 200msec as the
ring indicator function on nRI1 pin. The leading
high-to-low edge is the trigger for the ring
indication.
0=Ring indicate function is high-to-low transition on
the nRI1 pin.
Bit[2]: 1=Enable detection of pulse train of
frequency 15Hz or higher and generate an active
low pulse for its duration to use for 200msec as the
ring indicator function on nRI2 pin. The leading
high-to-low edge is the trigger for the ring
indication.
0=Ring indicate function is high-to-low transition on
the nRI2 pin.
Bit[5:3] Reserved
Bit[6] XTAL CAP. This bit is used to specify the
load capacitance of the 32kHz XTAL: 0=12pF
(Default), 1=6pF.
Bit[7] P17/P12. 0=the function of P17/P12 on GP12
(pin 79) and GP64 (pin 87) is P17. (Default)
1=the function of P17/P12 on GP12 (pin 79) and
GP64 (pin 87) is P12 and the keylock function is
not active.
186
SMSC [ SMSC CORPORATION ]
