Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
In Auto Fan mode, if any zone associated with a PWM output exceeds the temperature set in the
Absolute limit register, all PWM outputs will increase their duty cycle to 100% except those that are
disabled via the PWM Configuration registers. This is a safety feature that attempts to cool the system
if there is a potentially catastrophic thermal event.
If an absolute limit register set to 80h (-128°c), the safety feature is disabled for the associated zone.
That is, if 80h is written into the Zone x Temp Absolute Limit Register, then regardless of the reading
register for the zone, the fans will not turn on-full based on the absolute temp condition.
Default =100°c=64h.
When any fan is in auto fan mode, then if the temperature in any zone exceeds absolute limit, all fans
go to full, including any in manual mode, except those that are disabled. Therefore, even if a zone is
not associated with a fan, if that zone exceeds absolute, then all fans go to full. In this case, the
absolute limit can be chosen to be 7Fh for those zones that are not associated with a fan, so that the
fans won't turn on unless the temperature hits 127 degrees.
Table 8.37 Absolute Limit vs. Register Setting
ABSOLUTE LIMIT
ABS LIMIT (DEC)
ABS LIMIT (HEX)
-127°c
-127
81h
.
.
.
.
.
.
.
.
.
-50°c
-50
CEh
.
.
.
.
.
.
.
.
.
0°c
0
00h
.
.
.
.
.
.
.
.
.
50°c
50
32h
.
.
.
.
.
.
.
.
.
127°c
127
7Fh
8.2.21
Register 6F: XOR Test Register
Table 8.38 Register 6F: XOR Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
6Fh
R/W
XOR Test Register
RES
RES
RES
RES
RES
RES
RES
XEN
00h
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
The part incorporates an XOR tree test mode. When the test mode is enabled by setting the ‘XEN’ bit
high via SMBus, the part enters XOR test mode.
The following signals are included in the XOR test tree:
■
VID0, VID1, VID2, VID3, VID4
Revision 0.4 (04-04-05)
SMSC EMC6D103
DATA7S2HEET
SMSC [ SMSC CORPORATION ]
